Chip packaging structure and packaging method
A technology of packaging structure and packaging method, which is applied in the manufacturing of electrical components, electric solid-state devices, semiconductor/solid-state devices, etc. The effect of signal transmission
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[0052] The present invention will be described in detail below in conjunction with specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, method, or functional changes made by those skilled in the art according to these embodiments are included in the protection scope of the present invention.
[0053] In each drawing of the present invention, for convenience of illustration, some dimensions of structures or parts are exaggerated relative to other structures or parts, and therefore, are only used to illustrate the basic structure of the subject matter of the present invention.
[0054] combine figure 2 , is a schematic diagram of a package structure 200 of a chip according to an embodiment of the present invention.
[0055]The packaging structure 200 includes a first circuit board 20 , a substrate 30 , a first chip 31 , a first metal ball 32 , a second circuit board 40 , a second chip 41 and...
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