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A method for placing chips in grooves

A chip-in-groove technology, applied to semiconductor devices, electrical components, circuits, etc., can solve the problems of different chip thicknesses, unfavorable wafer-level RDL interconnection process, and uneven placement, and achieve the effect of improving integration

Active Publication Date: 2022-04-26
浙江集迈科微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Now the most widely studied silicon cavity embedded fan-out structure can effectively solve the integration problem of RF microsystem modules, but there are different thickness problems for chips embedded in the cavity, and even at the same height, there are often placement problems. The problem of unevenness is not conducive to the subsequent wafer-level RDL interconnection process

Method used

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  • A method for placing chips in grooves
  • A method for placing chips in grooves
  • A method for placing chips in grooves

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0032] like Figure 1 to Figure 6 As shown, a chip placement method in a groove specifically includes the following steps:

[0033] 101) Groove making step: use photolithography and etching to make grooves on the surface of the fan-out embedded carrier 101, the grooves are rectangular, the side length ranges from 1um to 10000um, and the depth ranges from 10um to 1000um. The colloid 106 is poured into the groove by dispensing or coating process, the residual colloid 106 on the surface of the groove is removed by etching or grinding process, and only the colloid 106 in the groove is retained. Wherein, the material of the colloid 106 can be photoresist, epoxy resin, thermosetting glue, glass powder, inorganic material and so on.

[0034] 102) Chip embedding step: embed the cut chip 103 into the groove by FC process, and heat the bottom of the fan-out embedding carrier 101 to soften the glue 106 . The cover plate 102 is used to cover the side of the fan-out embedding carrier 101...

Embodiment 2

[0038] like Figure 7 , Figure 8 As shown, a chip placement method in a groove specifically includes the following steps:

[0039] 101) Groove making step: use photolithography and etching to make grooves on the surface of the fan-out embedded carrier 101, the grooves are rectangular, the side length ranges from 1um to 10000um, and the depth ranges from 10um to 1000um. The colloid 106 is poured into the groove by dispensing or coating process, the residual colloid 106 on the surface of the groove is removed by etching or grinding process, and only the colloid 106 in the groove is retained. Wherein, the material of the colloid 106 can be photoresist, epoxy resin, thermosetting glue, glass powder, inorganic material and so on.

[0040] 102) Chip embedding step: embed the cut chip 103 into the groove by FC process, and heat the bottom of the fan-out embedding carrier 101 to soften the glue 106 . The cover plate 102 is used to cover the side of the fan-out embedding carrier 10...

Embodiment 3

[0045] like Figure 9 to Figure 11 As shown, a chip placement method in a groove specifically includes the following steps:

[0046] 101) Groove making step: use photolithography and etching to make grooves on the surface of the fan-out embedded carrier 101, the grooves are rectangular, the side length ranges from 1um to 10000um, and the depth ranges from 10um to 1000um. The colloid 106 is poured into the groove by dispensing or coating process, the residual colloid 106 on the surface of the groove is removed by etching or grinding process, and only the colloid 106 in the groove is retained. Wherein, the material of the colloid 106 can be photoresist, epoxy resin, thermosetting glue, glass powder, inorganic material and so on.

[0047] 102) Chip embedding step: embed the cut chip 103 into the groove by FC process, and heat the bottom of the fan-out embedding carrier 101 to soften the glue 106 . The cover plate 102 is used to cover the side of the fan-out embedding carrier 10...

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Abstract

The invention discloses a chip placement method in a groove, which specifically includes the following steps: 101) making a groove step, 102) embedding a chip step, and 103) forming a step; the invention provides convenient manufacturing, simplified process, improved integration and chip A method of in-groove chip placement for flatness.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for placing chips in grooves. Background technique [0002] Millimeter wave radio frequency technology is developing rapidly in the semiconductor industry. It is widely used in high-speed data communication, automotive radar, airborne missile tracking system, and space spectrum detection and imaging. It is expected that the market will reach 1.1 billion US dollars in 2018 and become an emerging industry. New applications put forward new requirements for the electrical performance, compact structure and system reliability of the product. For the wireless transmitting and receiving system, it cannot be integrated into the same chip (SOC), so it is necessary to integrate different chips including radio frequency units. , filters, power amplifiers, etc. are integrated into an independent system to realize the functions of transmitting and receiving signals. [0003] ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/98
CPCH01L25/50H01L21/50
Inventor 冯光建
Owner 浙江集迈科微电子有限公司