A high-speed interconnection network topology discovery method, device, medium and high-performance computing system
A high-performance computing and high-speed interconnection technology, applied in the transmission system, electrical components, etc., can solve the problems of inability to perform interconnection network topology, inspection, and shorten the debugging time of the interconnection network, so as to meet the requirements of rapid inspection and simple principle , The effect of shortening the debugging time
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[0047] like figure 1 , the implementation steps of the high-speed interconnection network topology discovery method for a high-performance computing system in this embodiment include:
[0048] 1) Initialize the seed queue and adjacency list to be empty;
[0049] 2) accessing the peer tag information in the network interface chip of the node, and adding the network interface chip recorded in the peer tag information to the seed queue;
[0050] 3) construct a source routing table entry pointing to the peer network interface chip, and the source routing table is a data structure allocated in the management server memory for recording the round-trip routing path between the management server and each network chip;
[0051] 4) Use the first network switch chip in the seed queue as the current network switch chip and delete it from the seed queue;
[0052] 5) Access the peer label information of all ports of the current network switch chip;
[0053] 6) Take out the peer tag infor...
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