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A reconfigurable three-dimensional microsystem packaging structure and packaging method

A packaging structure and three-dimensional packaging technology, which is applied in the fields of semiconductor/solid-state device components, semiconductor devices, electrical components, etc., can solve the problems that sub-modules cannot be independently tested, and three-dimensional micro-systems of subsystem modules cannot be used, so as to expand the applicable field. , the effect of increasing the degree of freedom

Active Publication Date: 2021-10-08
SHANGHAI SPACEFLIGHT ELECTRONICS & COMM EQUIP RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The technical problem to be solved by the present invention is to provide a reconfigurable three-dimensional microsystem packaging structure and packaging method to solve the problem that the sub-modules in the existing three-dimensional microsystem architecture cannot be tested independently, and the early failure of the subsystem module leads to the failure of the entire three-dimensional microsystem. problem of use

Method used

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  • A reconfigurable three-dimensional microsystem packaging structure and packaging method
  • A reconfigurable three-dimensional microsystem packaging structure and packaging method
  • A reconfigurable three-dimensional microsystem packaging structure and packaging method

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Embodiment 1

[0042] see figure 1 , in one embodiment, a reconfigurable three-dimensional microsystem packaging structure, including: at least two two-dimensional subsystem modules, a three-dimensional packaging layer, the two-dimensional subsystem modules are stacked in sequence and communicate with each other in electrical signals; the three-dimensional packaging layer is arranged on The stacked two-dimensional subsystem modules are used to package the stacked two-dimensional subsystem modules, and the outer surface of the three-dimensional packaging layer is provided with a surface metallization conductor wiring layer 113;

[0043] The two-dimensional subsystem module includes a chip carrier, an adapter board 104, at least two chips 106, a test interconnection structure corresponding to the chips 106, and a two-dimensional packaging layer; the adapter board 104 is arranged on the chip carrier; the chips 106 are all Set on the adapter plate 104, and form an electrical signal connection th...

Embodiment 2

[0058] This embodiment is a packaging method for a reconfigurable three-dimensional microsystem packaging structure, which is used to produce the reconfigurable three-dimensional microsystem packaging structure in the first embodiment above, and the steps are as follows:

[0059] S1: Provide a chip carrier, open at least two required first through holes on the chip carrier, and set in-plane vertical interconnection 105 in the first through holes; use thin film deposition equipment and pattern electroplating on the surface of the chip carrier The equipment performs metallization layer 117 preparation;

[0060] S2: Provide an adapter board 104, the surface of the adapter board 104 is prepared with thin film deposition equipment and pattern electroplating equipment to prepare the metallization layer and respectively form a corresponding subsystem functional circuit unit with the chip 106; and on the adapter board 104, Mounting the chip 106 using a low temperature soldering proces...

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Abstract

The invention discloses a reconfigurable three-dimensional microsystem packaging structure and a packaging method. The inside of the reconfigurable three-dimensional microsystem packaging structure is divided into several two-dimensional A test interconnection structure including a side interconnection, an in-plane through-hole interconnection, and an in-plane vertical interconnection is set in the subsystem module, and adjacent two-dimensional subsystem modules are connected through their respective test interconnection structures. Electrical signal connection; and the two-dimensional subsystem module can be independently tested and screened through the test interconnection structure, becoming a known good two-dimensional subsystem module, which improves the degree of freedom of the three-dimensional micro-system architecture and the testability of each sub-module, It can avoid problems such as early failure of subsystem modules that make the entire 3D microsystem unusable, simple integrated design that cannot take into account both generality and special applications, high cost and long cycle microsystem development that does not match the evolution of application requirements, etc., reflecting the three-dimensional availability of integrated electronic microsystems. Refactoring requirements.

Description

technical field [0001] The invention belongs to the field of microelectronic packaging, in particular to a reconfigurable three-dimensional microsystem packaging structure and packaging method. Background technique [0002] Based on the judgment of the future information model, the development trend of information electronic equipment and the development trend of micro-nano electronic technology, the rapid development of integrated micro-system technology has given birth to the functions of signal perception, signal transmission, signal processing, signaling execution and empowerment. Microsystem technology combined with architecture and algorithm. Using film integrated circuit substrates (such as HTCC, LTCC, thin films, etc.) and metal-based high thermal conductivity integrated circuit substrates as carriers, the three-dimensional packaging and integration of various chips is one of the important technical approaches to realize high-reliability microsystems. However, due t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/31H01L21/56H01L25/065
CPCH01L21/56H01L23/3114H01L25/0657H01L2225/06548H01L2225/06551H01L2225/06589
Inventor 陈靖丁蕾刘凯任卫朋李虎王立春赵涛宋晓东
Owner SHANGHAI SPACEFLIGHT ELECTRONICS & COMM EQUIP RES INST