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High-reliability data exchange method for CPU and DSP

A data exchange and data technology, applied in the field of data interaction, can solve the problems of prone to data conflict, complex software processing, complex system, etc., to achieve the effect of increasing data conflict prevention technology, simplifying data exchange structure, and high efficiency

Active Publication Date: 2020-09-18
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In order to solve the problems that the existing CPU and DSP need to use a dedicated dual-port RAM chip when exchanging data, the system is complex, the cost is high, and data conflicts are prone to occur during data interaction, and software processing is complicated. The present invention provides a CPU. Highly reliable data exchange method with DSP

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  • High-reliability data exchange method for CPU and DSP
  • High-reliability data exchange method for CPU and DSP
  • High-reliability data exchange method for CPU and DSP

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Embodiment Construction

[0035] Below in conjunction with accompanying drawing and embodiment the present invention will be further described:

[0036] see figure 1 , a CPU and DSP data exchange method with high reliability, the specific process is as follows:

[0037] Step 1: realize the interface conversion between the CPU bus interface and the HPI interface of the DSP through the FPGA interface conversion logic;

[0038] In this embodiment, the CPU bus is a PCI interface, and the DSP bus is an EMIF interface; the interface conversion logic of "PCI-EMIF" is realized by the FPGA, so that the CPU can access the HPID, HPIA, and HPIC registers of the HPI controller in the configuration DSP to realize Access to DSP memory space;

[0039] Step 2: Space division of DSP memory data

[0040] Before data exchange, according to the system requirements, determine the number and size of the data areas required by the system, divide the DSP memory data into multiple data areas according to the address, and div...

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Abstract

The invention discloses a high-reliability data exchange method for a CPU and a DSP. According to the method, a traditional dual-port RAM is replaced based on the HPI interface technology of the DSP,the data exchange structure between processors is simplified, and data exchange between a CPU and the DSP is achieved through a built-in bus interface of the CPU and the HPI interface conversion logic, achieved through an FPGA, of the CPU bus interface and the DSP. Meanwhile, bus idle state judgment logic is achieved by designing a register and used for preventing data conflicts and improving dataexchange reliability. When the CPU and the DSP need to exchange data, the states of the bus and the DSP data area are inquired firstly, and then data exchange is initiated according to a preset datainteraction strategy. The method has the characteristics of simple structure, high efficiency, high reliability, high practicability and the like.

Description

technical field [0001] The invention belongs to data interaction technology, and in particular relates to a highly reliable data exchange method between a CPU and a DSP. Background technique [0002] In the field of aviation and industrial control, for equipment with signal acquisition and processing and system control that needs to be completed jointly by CPU and DSP, dual-port RAM is usually used to realize data interaction between the two processors. However, this method requires the additional use of a dedicated dual-port RAM chip, resulting in complex systems, high costs, and problems such as data conflicts and complex software processing that are prone to occur during data interaction. Contents of the invention [0003] In order to solve the problems that the existing CPU and DSP need to use a dedicated dual-port RAM chip when exchanging data, the system is complex, the cost is high, and data conflicts are prone to occur during data interaction, and software processi...

Claims

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Application Information

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IPC IPC(8): G05B19/042
CPCG05B19/0423G05B2219/23262
Inventor 林凯于正同刘源张弛谢宇辰
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA