Novel silicon-on-insulator wafer and manufacturing method thereof
A silicon-on-insulator technology and a manufacturing method are applied in the field of silicon-on-insulator wafers of optical waveguide materials and their manufacturing fields, which can solve the problems of low optical coupling efficiency, low integration and low coupling efficiency, and achieve improved coupling efficiency and high optical field. The effect of limiting, efficient coupling
Pending Publication Date: 2020-11-27
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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[0003] Due to the limitations of the low optical coupling efficiency of the existing silicon-on-insulator material, silicon-based photonic devices and PLC optical waveguide devices are usually used separately, and the two a
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[0032] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings. However, the present invention can be implemented in different forms and should not be construed as being limited to the embodiments presented here. On the contrary, the provision of these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. In the drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity, and the same reference numerals denote the same elements throughout.
[0033] The present invention provides a novel silicon-on-insulator wafer and its manufacturing method, such as figure 1 As shown, it includes: a first substrate, the material composition of which is silicon or silicon dioxid...
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Abstract
The invention discloses a novel silicon-on-insulator wafer and a manufacturing method thereof, wherein the wafer comprises a first substrate which is the lowermost layer of the silicon-on-insulator wafer and is made of silicon or silicon dioxide; a first buried oxide layer which is a second layer of the silicon-on-insulator wafer and is made of silicon dioxide; a second buried oxide layer which isa third layer of the silicon-on-insulator wafer and is made of silicon dioxide; a second substrate which is the uppermost layer of the silicon-on-insulator wafer, wherein the material component is silicon. The novel silicon-on-insulator wafer can be used as an integrated material of a silicon-based photonic device and a PLC optical waveguide device, and has the characteristics of high refractiveindex and high optical field limitation, so that the silicon-based photonic device and the PLC optical waveguide device can be subjected to monolithic integration, and the coupling efficiency of a chip and an optical fiber is improved. The novel silicon-on-insulator wafer prevents the defects of large size, low integration level, low coupling efficiency and inconvenience in use when a silicon-based photonic device and a PLC optical waveguide device are used separately.
Description
Technical field [0001] The present disclosure relates to the field of optical fiber communication and integrated optics, and in particular to a silicon-on-insulator wafer of optical waveguide material applied to the integration of silicon-based photonic devices and PLC optical waveguide devices and a manufacturing method thereof. Background technique [0002] In the field of optical fiber communication and integrated optics, silicon-on-insulator (SOI) is an important optical waveguide material used in silicon-based photonic devices and PLC optical waveguide devices in recent years. The silicon-on-insulator wafer commonly used in existing silicon-based photonic devices includes: a silicon substrate layer, a middle silicon dioxide buried oxide layer, and a top thin layer of silicon. The structure is generally formed by back etching, smart stripping technology, and oxygen injection isolation method; while the silicon-on-insulator wafer commonly used in PLC optical waveguide devices ...
Claims
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Login to View More IPC IPC(8): H01L21/762H01L27/12
CPCH01L21/7624H01L27/1203
Inventor 杨林杨尚霖
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI