A single-level single-wire full-duplex bus communication method and system

A bus communication and full-duplex technology, applied in the field of server boards, can solve problems such as the inability to guarantee real-time interaction between boards, difficulty in realization, and complex hardware solutions, so as to increase real-time performance, reduce costs, and reduce PCB area. Effect

Active Publication Date: 2022-02-18
INSPUR SUZHOU INTELLIGENT TECH CO LTD
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Problems solved by technology

Taking the existing single-wire UART as an example, its working level is 0 and 1, which is a single power supply, but it works in half-duplex mode, which cannot guarantee the real-time interaction between boards and cards.
However, the existing single-wire full-duplex bus adopts the multi-level mode (-1, 0, 1). Judging the received data, the disadvantage is that the hardware scheme is complicated, and it is difficult to realize for digital circuits

Method used

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  • A single-level single-wire full-duplex bus communication method and system
  • A single-level single-wire full-duplex bus communication method and system

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Embodiment Construction

[0026] In order to clearly illustrate the technical features of the solution, the present invention will be described in detail below through specific embodiments and in conjunction with the accompanying drawings. The following disclosure provides many different embodiments or examples for implementing different structures of the invention. In order to simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and / or letters in different instances. This repetition is for the purpose of simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and processes are omitted from the present invention to avoid unneces...

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Abstract

The present invention discloses a single-level single-wire full-duplex bus communication method and system. The method includes: the signal transceiver terminal A1 sends data according to the internal transmission clock F1, monitors the level change on the bus at the same time, and analyzes the received data; the signal transceiver The terminal B1 sends data according to the internal transmission clock F2, and monitors the level change on the bus at the same time, and analyzes the received data; the signal transceiver terminal A1 and the signal transceiver terminal B1 realize communication through a single line; the transmission clock F1>F2*(data unit length +2). The system realizes single-level single-wire full-duplex communication by using different encoding formats and different internal transmission clocks, which not only reduces the number of signal lines, but also uses 0,1 universal digital levels to achieve single-level communication , reducing the difficulty of hardware implementation.

Description

technical field [0001] The invention relates to the field of server boards, in particular to a single-level single-wire full-duplex bus communication method and system. Background technique [0002] In the field of servers, in order to increase the interactivity and adaptability between boards, additional signals are often added between boards to ensure effective communication and mutual identification between boards. The interconnection between boards is mostly connected by cables. The more signals that the boards interact with, the more cables are used, and the printed circuit board (PCB) area occupied by the connectors is also The corresponding increase will result in an increase in hardware cost; at the same time, the increase in the number of connection points of the connector will also reduce the reliability of signal transmission. [0003] In order to reduce the number of signals between each board, the measures of serial-to-parallel conversion are generally adopted ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/40G06F15/163
CPCH04L12/40G06F15/163G06F13/4004H04L12/12
Inventor 葛志华
Owner INSPUR SUZHOU INTELLIGENT TECH CO LTD
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