Pixel arrangement structure and display panel

Abstract

The present application provides a pixel arrangement structure and a display panel. The pixel arrangement structure includes at least two adjacently arranged pixel electrodes, wherein a data line is arranged in the pixel electrode, and the data line is arranged toward a first direction, and two adjacent pixel electrodes are arranged. The pixel electrodes are connected by transparent conductive glass, the transparent conductive glass is arranged toward the second direction, the first direction is arranged perpendicular to the second direction, the side of the pixel electrode is provided with a gate driving circuit, and the The gate drive lines are parallel to the data lines. In the present application, the transparent conductive glass facing directly above the data line is removed. At this time, the storage capacitor has no positive overlapping capacitance, and all of it becomes a lateral capacitance, and the capacitance value is greatly reduced. At the same time, two adjacent pixel electrodes are connected through transparent conductive glass, so that the pixel electrodes can be completely charged and normal display is realized. This scheme avoids the capacitive coupling effect of the pixel electrodes, thus avoiding vertical crosstalk during panel display.

Description

technical field [0001] The present application relates to the field of display technology, and in particular, to a pixel arrangement structure and a display panel. Background technique [0002] In order to realize the design of the ultra-narrow bezel panel, it is necessary to cancel the GOA circuits arranged on the left and right sides, and choose to distribute the relevant signal lines from the source side to the source opposite side through the interior of the display pixel. In the prior art, a gate transistor line made of a third layer of metal is added, and for this purpose, the data line is placed inside the pixel, but the problem is that the data line and the pixel electrode generate a very large parasitic capacitance. The converted signal is transmitted inside the data line, and through the parasitic capacitance, the pixel electrode signal produces a capacitive coupling effect, which leads to vertical crosstalk when the panel is displayed, which affects the display qu...

AI Technical Summary

Problems solved by technology

In the prior art, the gate transistor circuit made of the third layer of metal is added, and the data line is placed inside the pixel for this purpose, but the problem brought about is that the data line and the pixel electrode generate a very large parasitic capacitance, due to The internal transmission of the data line is the transformation signal, and through the parasitic capacitance, the pixel electrode signal will have a capacitive coupling effect, resulting in vertical crosstalk when the panel is displayed, affecting the display quality

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