Direct digital frequency synthesis method
A digital frequency synthesis, direct technology, applied in the direction of electrical components, logic circuits, pulse technology, etc., can solve the problems of low spurious suppression ratio, inability to output waveform spurious suppression, increased application cost, etc., to improve the spurious suppression ratio , save lookup table resources, and expand the effect of the application
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[0028] Such as figure 1 A kind of direct digital frequency synthesis method shown, it is characterized in that, this method comprises the following steps:
[0029] a. Input the given frequency control word into the phase accumulator for accumulation and integration to obtain the output phase φ with a bit width of M 0 ;
[0030] b. Change the phase φ 0 decomposed into two random phases φ 1 and φ 2 ;
[0031] c. Randomize the phase φ 1 and φ 2 Carry out equal bit width decomposition respectively, and decompose into a plurality of equal bit width phases whose effective phase bit width is N, wherein, N satisfies M=2x*N, (x=1, 2, 3...);
[0032] d. Construct a lookup table corresponding to the phase of equal bit width one by one;
[0033] e. Query the lookup table;
[0034] f. Perform signal synthesis on the query results to obtain the final signal;
[0035] g. Send the final signal to the digital-to-analog converter for output.
[0036] Phase φ in step b 0 The method o...
Embodiment 1
[0066] In this embodiment, the phase equal bit width decomposition takes the parity bit decomposition method of random phase binary numbers as an example, and performs direct digital frequency synthesis according to the following steps:
[0067] a. Set the phase bit width of the frequency control word to 20 bits, input it into the phase accumulator, accumulate and integrate according to the clock beat, and obtain the output phase. In this embodiment, the output phase is 1024.
[0068] b. Phase random decomposition. Use the random phase I generated by the original polynomial, take the random phase I as 566, and the address of the corresponding random phase II is 1024-566=458; quantify the two phases according to the bit width of 20 bits respectively: the random phase I corresponds to 566 The binary phase address table is: (0000000000-1000110110), and the binary phase address table corresponding to random phase II 458 is: (0000000000-0111001010);
[0069] c. Decompose the phase...
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