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Multi-chip synchronization monitored via single pin of external timing capacitor

A technology of capacitors and timing circuits, used in instruments, circuits, electronic switches, etc., can solve problems such as accidents and system loss of synchronization

Pending Publication Date: 2020-12-29
TEXAS INSTR INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when combining existing IC chips in this way, unexpected problems can arise and cause the system to lose synchronization

Method used

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  • Multi-chip synchronization monitored via single pin of external timing capacitor
  • Multi-chip synchronization monitored via single pin of external timing capacitor
  • Multi-chip synchronization monitored via single pin of external timing capacitor

Examples

Experimental program
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Embodiment Construction

[0017] Specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings. In the following detailed description of the embodiments of the invention, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without these specific details. In other instances, well known features have not been described in detail to avoid unnecessarily complicating the description.

[0018] figure 1 An example power supply system 100 is described in which IC chips 102A, 102B need to provide a synchronized response to a triggering event, such as a fault condition. In the power supply system 100, IC chips 102A, 102B are mounted on a circuit board 104 and coupled in parallel between an input voltage Vin and an output voltage Vout. Each of the IC chips 102A, 102B includes a timing circ...

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PUM

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Abstract

A method (400) of operating the IC chip in response to an event trigger is provided. The method includes responsive to the event trigger, coupling (405) a pin to a source of constant current to chargean external capacitor coupled to the pin and monitoring (410) a capacitor voltage on the pin; if the magnitude of the capacitor voltage is greater than a rising threshold, enabling detection (415) ofa falling threshold; if the magnitude of the capacitor voltage is greater than a voltage threshold, triggering a first response (420) and coupling the pin (420) to the lower rail to discharge the external capacitor; and if detection of the falling threshold is enabled and the magnitude of the capacitor voltage is less than the falling threshold, also triggering the first response (425).

Description

technical field [0001] This relates to the area of ​​multi-chip synchronization in general. More specifically, and without limitation, the present disclosure relates to a system, device, and method for single-pin multi-chip synchronization via external timing capacitors. Background technique [0002] exist Figure 5 One method of providing delayed or timed events using an integrated circuit (IC) chip is shown in , where a power system 500 is shown on a circuit board 502 . The power system 500 includes an IC chip 504, which may be, for example, a load switch or a low dropout (LDO) regulator. The IC chip 504 is coupled to an input voltage Vin through a pin Pa, and provides an output voltage Vout through a pin Pb. Although not specifically shown in this figure, a power transistor is coupled between an input voltage Vin and an output voltage Vout to control when current is allowed to flow. [0003] IC chip 504 includes a timing circuit 506 coupled to an external capacitor C1 ...

Claims

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Application Information

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IPC IPC(8): H03K4/502H03K17/0416H03K17/56H03K17/62
CPCH03K17/12H03K17/16H03K17/14H03K17/22H03K17/6871G01R19/16552H03L7/00
Inventor L·J·格瓦克斯K·W·齐默R·D·乔丹格尔H·托雷斯
Owner TEXAS INSTR INC