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Data processing method, device, computer equipment and storage medium of memory chip

A data processing device and memory chip technology, applied in the field of data processing, can solve the problem of irreversible data in memory chips, and achieve the effect of avoiding irreversible data errors

Active Publication Date: 2021-06-08
SHENZHEN SHICHUANGYI ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Embodiments of the present invention provide a data processing method, device, computer equipment, and storage medium for a memory chip, aiming at solving irreversible data errors in the memory chip in the prior art

Method used

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  • Data processing method, device, computer equipment and storage medium of memory chip
  • Data processing method, device, computer equipment and storage medium of memory chip
  • Data processing method, device, computer equipment and storage medium of memory chip

Examples

Experimental program
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Embodiment 1

[0026] see Figure 4 , which shows the data processing method of the memory chip in the first embodiment of the present invention, which can be applied to computer equipment, and the server can implement the method through hardware and / or software, and the method specifically includes step S01-step S04.

[0027] Step S01, receiving a data read request sent by a master device.

[0028] Wherein, the data read request carries a logical block address of the requested data. In the embodiment of the present invention, the main device is the main operating device, for example: the main control corresponding to the tablet computer is the main device, and the storage device is the slave device.

[0029] Step S02, look up the physical block address corresponding to the logical block address according to the address mapping table.

[0030] Wherein, the address mapping table stores a mapping relationship between logical block addresses and physical block addresses. When the master dev...

Embodiment 2

[0040] see Figure 5 , shows the data processing method of the memory chip in the second embodiment of the present invention. The difference between the data processing method of the memory chip in this embodiment and the data processing method of the memory chip in the first embodiment is that the The method also includes:

[0041] Step S11, when the master device is idle, scan valid data of the master device.

[0042] In this embodiment, the valid data of the master device is scanned, that is, all the data in all physical blocks are scanned, and then the valid data in each physical block is determined, and then the valid data of each physical block is calculated according to the valid data in the physical block. BER.

[0043] In this embodiment, after the logical address corresponding to the data stored in a certain page in the block is updated, the data corresponding to the page is invalid data, and the newly written data is valid data. For example, the data of logical add...

Embodiment 3

[0053] see Figure 6 , shows the data processing method of the memory chip in the third embodiment of the present invention, the difference between the data processing method of the memory chip in this embodiment and the data processing method of the memory chip in the first and second embodiments is that , determining whether the bit error rate of the physical block corresponding to the physical block address exceeds a preset bit error rate threshold, including:

[0054] In step S10, the data read from the physical block is decoded by the ECC engine to obtain the data bit error rate of each physical page in the physical block.

[0055] Wherein, the physical block includes multiple physical pages. ECC engine (Error Correcting Code, error correction engine) is a technology that can realize error checking and correction. To realize error correction, the ECC engine encodes the data before writing the data into the memory chip, so the data is read from the storage After the chip...

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Abstract

The present invention is applicable to the technical field of data processing, and provides a data processing method, device, computer equipment and storage medium for a memory chip. The method includes: receiving a data reading request sent by a master device, and the data reading request carries There is a logical block address; look up the physical block address corresponding to the logical block address according to the address mapping table, the mapping relationship between the logical block address and the physical block address is stored in the address mapping table; determine the physical block address corresponding to the physical block address Whether the bit error rate of the block exceeds the preset bit error rate threshold; if it is determined that the bit error rate of the physical block exceeds the preset bit error rate threshold, then transfer the valid data in the physical block to a blank physical block, and return the read valid data to the master device.

Description

technical field [0001] The invention belongs to the technical field of data processing, and in particular relates to a data processing method, device, computer equipment and storage medium of a memory chip. Background technique [0002] Memory chips on the market consist of a flash controller and flash media. The flash memory is divided into: SLCNand, MLC Nand, TLC Nand, QLC Nand according to the medium. A storage unit Cell of SLC Nand stores 1Bit data; a storage unit Cell of MLCNand stores 2Bit data; a storage unit Cell of TLC Nand stores 3Bit data; a storage unit Cell of QLCNand stores 4Bit data ( Figure 1 to Figure 3 Voltage distribution diagram for SLC, MLC, TLC memory cells) [0003] Because the more data stored in a Cell, the higher the precision required, and the greater the mutual interference it brings. This determines that in terms of stability and reliability, SLC Nand is better than MLC Nand, MLC Nand is better than TLC Nand, and TLCNand is better than QLC Nan...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/02G06F11/10
CPCG06F11/1068G06F12/0246G06F2212/7201
Inventor 倪黄忠卢颖福
Owner SHENZHEN SHICHUANGYI ELECTRONICS
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