Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Multi-chip mounting structure and preparation method thereof

A multi-chip and placement technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as difficulty in effectively realizing on-demand filling, difficulty in filling packaging structures, and large influence between steps. Improve process efficiency and product yield, reduce filling difficulty, and solve the effect of filling bubbles

Active Publication Date: 2021-04-23
浙江集迈科微电子有限公司
View PDF3 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a chip mount structure and a method for preparing the chip mount structure, which are used to solve the problem of the difficulty in forming an effective underfill at the bottom of a multi-chip structure in the prior art. The packaging structure of the chip integration is difficult to fill, the process is complicated, the influence between steps is large, and it is difficult to effectively realize on-demand filling.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Multi-chip mounting structure and preparation method thereof
  • Multi-chip mounting structure and preparation method thereof
  • Multi-chip mounting structure and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0038] Such as figure 1 As shown, the present invention provides a kind of preparation method of multi-chip mounting structure, and described preparation method comprises the following steps:

[0039] S1, providing the substrate;

[0040] S2, attaching a chip assembly to be packaged on the substrate, the chip assembly to be packaged includes at least two chips to be packaged, and there is a distance between adjacent chips to be packaged;

[0041] S3, preparing an auxiliary filling layer on the chip assembly to be packaged, the auxiliary filling layer connecting each of the chips to be packaged;

[0042] S4, coating an underfill material on the periphery of the chip component to be packaged, so that at least the filling auxiliary layer, the underfill material, and the substrate form a cavity, and corresponding to the cavity, there is a gas inlet and a gas exit;

[0043] S5, applying negative pressure at the gas outlet, and correspondingly coating the underfill material at th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a multi-chip mounting structure and a preparation method, and the preparation method comprises the steps: mounting a plurality of chips on a substrate, preparing a filling auxiliary layer on the chips to form a cavity, forming a gas inlet and a gas outlet corresponding to the cavity, coating the gas inlet with a primer filling material, and applying a negative pressure at the gas outlet; enabling the primer filling material to flow into the bottoms of the chips based on the air pressure to form underfill. For a packaging structure of a plurality of chip modules, the cavity is constructed between a to-be-packaged chip and a substrate, the primer filling material is coated at the gas inlet, and negative pressure is applied at the gas outlet, so that the underfill is pressed into the bottoms of the chips under the action of gas pressure, the filling difficulty of the underfill of the multi-chip structure can be reduced, and the problem of filling bubbles is favorably solved. And the problems that in a multi-chip small-spacing structure, the glue filling head is difficult to place, the glue filling process is complex, and the influence on the structure of the previous step is large can be solved. The process is simple, and the problem that filling is performed as required when a plurality of chips are difficult to integrate can be solved.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, and in particular relates to a mounting chip structure and a preparation method for the mounting chip structure. Background technique [0002] The bottom mounting technology of the chip is the main way for the chip to be connected to the terminal. In order to prevent the large stress difference between the chip and the substrate from causing the solder balls to break, it is often necessary to fill the bottom glue between the chip and the substrate. [0003] However, with the development of technology, the number of chips has increased and the size has become larger, and the number of chips mounted on the surface of the current module is large. At present, in the prior art, it is difficult to perform bottom filling according to actually needed chips among multiple chips, and not to fill unnecessary chips. In addition, it is very difficult for the underfill to completely occupy the space at...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/67H01L21/56
CPCH01L21/561H01L21/67121H01L21/67126
Inventor 冯光建顾毛毛黄雷郭西高群
Owner 浙江集迈科微电子有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products