Device and method for calibrating offset of comparator in high-speed ADC

Abstract

The invention discloses a device and a method for calibrating the offset of a comparator in a high-speed ADC. The device comprises an offset calibration module, a capacitor array, a transmission gate, a comparator latch, a pre-amplification circuit and a calibration imbalance connection circuit; the calibration imbalance connection circuit is connected with the first input end of the comparator; the transmission gate is connected with the second input end of the comparator; the pre-amplification circuit is used for amplifying a difference signal between a first input end input signal and a second input end input signal; the capacitor array is connected with the output end of the pre-amplification circuit; the comparator latc is used for comparing and outputting the amplified signal and a signal output by the capacitor array to obtain an output result; and the Offset calibration module is used for controlling the access mode of each capacitor in the capacitor array according to the output result and the differential SAR logic control program. According to the invention, the offset of the comparator is reduced while the speed of the high-speed ADC is improved.

Description

technical field [0001] The invention relates to the technical field of comparator offset calibration, in particular to a comparator offset calibration device and method in a high-speed ADC. Background technique [0002] In today's high-speed ADCs, due to power consumption and area considerations, more and more high-speed ADCs do not use a dedicated sample-and-hold circuit (SHA) like traditional high-speed ADCs, so the available redundancy for comparator offsets becomes smaller . And because the speed of the high-speed ADC is considered, it is necessary to make the size of the input transistor of the comparator small enough to reduce parasitics and increase the speed. Generally, the smallest size of the corresponding process is used, and the smaller the transistor size, the greater the mismatch. This can cause a very large comparator input offset. Contents of the invention [0003] The purpose of the present invention is to provide a comparator offset calibration device a...

AI Technical Summary

Problems solved by technology

And because the speed of the high-speed ADC is considered, it is necessary to make the size of the input transistor of the comparator small enough to reduce parasitics and increase the speed. Generally, the smallest size of the corresponding process is used, and the smaller the transistor size, the greater the mismatch. This can cause a very large comparator input offset

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