Semiconductor process method

A process method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device parts, semiconductor/solid-state device testing/measurement, etc., can solve the problems of identifying wafers, difficult to identify the direction of wafer kerf, and prone to errors

Active Publication Date: 2021-08-31
SIEN QINGDAO INTEGRATED CIRCUITS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the prior art, the backside of the wafer is usually photographed after the ink pass die is completed, and the positions of the defective chips on the picture are fitted to the front side of the wafer, and then cut according to the fitting result. However, due to the optical and image Due to various reasons such as depth scaling, errors are prone to occur in this process, and all defective chips cannot be correctly identified.
Specifically, optical reasons include unexpected offset during the photographing process, shadows caused by foreign objects, optical reflections, etc., or the color of the wafer is similar to the background and it is difficult to identify the wafer from the background, or it is difficult to identify the wafer The direction of the kerf, etc.; and the problem in the process of image depth scaling is usually due to the problem of the shooting angle that the captured wafer image is usually ellipsoidal, and it is difficult to reconstruct the defects on the wafer based on the ellipsoidal wafer image.

Method used

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  • Semiconductor process method
  • Semiconductor process method
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Embodiment Construction

[0034] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0035] see Figure 1 to Figure 5 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, although only the components related to the present invention are shown in the diagrams rather than the number, shape and Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual implementation, and th...

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Abstract

The invention provides a semiconductor process method, which comprises the following steps of 1) providing a background plate, and forming a rectangle on the background plate by using a positioning mark point, 2) placing the wafer in the rectangle of the positioning mark point with the back face upward, and photographing to obtain an ellipse-like wafer picture and the positioning mark point, 3) editing the picture, and marking the positions corresponding to the edge gaps and the defects of the wafer, 4) finding out wafer edges, defects, edge gaps and positioning mark points on the picture, (5) transforming the positioning mark points into rectangles with the same size as the rectangles in the step 1), 6) transforming the defect and the edge gap back to the position of the back of the original wafer, and reconstructing the depth distortion of the picture, 7) performing mirror surface overturning on the wafer, and 8) superposing the front defect position and the back defect position of the wafer to identify the chip with at least one of the front defect and the back defect. The defect of the back surface of the wafer can be accurately reflected to the front surface of the wafer, so that all defective chips can be accurately detected.

Description

technical field [0001] The invention relates to the field of semiconductor chip manufacturing, in particular to a semiconductor process method. Background technique [0002] Before the wafer is diced to separate the wafer into individual chips, there is usually a final inspection of the wafer. In this inspection, the chip has poor reliability or For other defects, it is necessary to mark the chip with defects, which is usually called "ink pass die" process. Any defect on the front and back of the wafer corresponding to the same chip needs to be marked, so the back defect of the wafer is reflected to the front of the wafer to finally determine all defects based on the front and back defects of the wafer. The location of the defective chip is very important. In the prior art, the backside of the wafer is usually photographed after the ink pass die is completed, and the positions of the defective chips on the picture are fitted to the front side of the wafer, and then cut acc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/66H01L23/544
CPCH01L22/24H01L22/30
Inventor 林光启陈真刘晨旭邱文莹
Owner SIEN QINGDAO INTEGRATED CIRCUITS CO LTD
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