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Method and system for testing digital filter to be tested

A digital filter and test method technology, which is applied in special data processing applications, calculations, computer-aided design, etc., can solve problems such as low test efficiency, large differences in input signals, and UVM simulation that cannot be used for large-scale system testing.

Pending Publication Date: 2021-09-03
HANGZHOU VANGO TECH
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  • Claims
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Problems solved by technology

However, the test signal in the UVM simulation environment is an ideal signal, which is quite different from the input signal received by the digital filter entity chip to be tested in the actual environment. Therefore, the filtering effect of the digital filter to be tested in the UVM simulation cannot represent the actual application. The filtering effect at the time cannot ensure that the physical chip of the digital filter to be tested can achieve the accuracy of UVM simulation. At the same time, UVM simulation cannot perform a large number of system tests, and the test efficiency is low.

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  • Method and system for testing digital filter to be tested
  • Method and system for testing digital filter to be tested
  • Method and system for testing digital filter to be tested

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Embodiment Construction

[0052] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0053] Since the test signal in the UVM simulation environment is an ideal signal, which is quite different from the input signal received by the digital filter entity chip to be tested in the actual environment, the filtering effect of the digital filter to be tested in the UVM simulation cannot represent the actual application. The filtering effect cannot ensure that the physical chip of the digital filter to be tested can reach the accuracy of UVM simulation...

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Abstract

The invention discloses a method and a system for testing a digital filter to be tested. The method comprises the following steps: generating code stream data by utilizing preset software; inputting the code stream data into a code stream processing device to generate a code stream digital signal; inputting the code stream digital signal into the to-be-tested digital filter to obtain a test result of the to-be-tested digital filter; wherein the process of generating the code stream data by using the preset software comprises the following steps: generating an ideal signal; superimposing analog signal noise in the ideal signal to obtain a first signal; and superimposing the analog-to-digital conversion noise in the first signal to obtain a second signal as code stream data. According to the invention, the code stream data simulating the actual condition is generated through the preset software, and the code stream data is generated into the code stream digital signal through the code stream processing device, so that the signal received by the to-be-tested digital filter is close to a real signal, the test result obtained by processing the signal by the to-be-tested digital filter is closer to the test effect in the actual working environment, and the invention has higher application value.

Description

technical field [0001] The invention relates to the field of filter design and testing, in particular to a testing method and system for a digital filter to be tested. Background technique [0002] Currently, the verification test of the digital filter to be tested is usually performed in a UVM simulation environment. First, the ideal digital filter to be tested is built by using the code in the UVM simulation environment, and then the test signal is input to the digital filter to be tested by using the UVM simulation environment, and the filtering effect is judged according to the output result of the digital filter to be tested. However, the test signal in the UVM simulation environment is an ideal signal, which is quite different from the input signal received by the digital filter entity chip to be tested in the actual environment. Therefore, the filtering effect of the digital filter to be tested in the UVM simulation cannot represent the actual application. The filter...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/33G06F119/10
CPCG06F30/33G06F2119/10
Inventor 何贤赚刘晓露黄苏芳李婷周杨凡朱信伟
Owner HANGZHOU VANGO TECH