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Chip verification method, terminal equipment, verification platform and storage medium

A verification method and verification platform technology, applied in fault hardware testing methods, instruments, electrical digital data processing, etc., can solve the problems of low chip verification efficiency and complex operation of chip verification process.

Active Publication Date: 2021-09-17
PENG CHENG LAB
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The main purpose of the present invention is to provide a chip verification method, terminal equipment, verification platform and storage medium, aiming to solve the complex operation of the chip verification process in the prior art, The technical problem of low chip verification efficiency

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  • Chip verification method, terminal equipment, verification platform and storage medium
  • Chip verification method, terminal equipment, verification platform and storage medium
  • Chip verification method, terminal equipment, verification platform and storage medium

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Embodiment Construction

[0052]The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0053] refer to figure 1 , figure 1 It is a schematic structural diagram of a terminal device in the hardware operating environment involved in the solution of the embodiment of the present invention.

[0054] Generally, a terminal device includes: at least one processor 301, a memory 302, and a chip verification program stored on the memory and operable on the processor, the chip verification program configured to implement the aforementioned chip ve...

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Abstract

The invention discloses a chip verification method used for terminal equipment, and the method comprises the following steps: based on a target verification plan, creating a target test case; sending the target test case to a field programmable gate array (FPGA) test device, so that the FPGA test device tests a to-be-tested chip in the FPGA test device by using the target test case to obtain test data; acquiring test data from the FPGA test device; sending the test data to a verification platform, so that the verification platform obtains a function coverage rate of the to-be-tested chip based on the test data; and obtaining a verification result of the to-be-tested chip based on the received function coverage rate returned by the verification platform. The invention further discloses the terminal equipment, a verification platform and a computer readable storage medium. By means of the chip verification method, the technical effect of improving the chip verification efficiency is achieved.

Description

technical field [0001] The invention relates to the technical field of chip verification, in particular to a chip verification method, terminal equipment, a verification platform and a storage medium. Background technique [0002] Using FPGA (Field Programmable Gate Array, field programmable logic gate array) for prototype verification is an important part of chip verification. Butt test. [0003] In the existing verification method, FPGA is used to verify the chip to be verified, and technical personnel manually record the parameters in the verification process, which makes the operation of the chip verification process complicated and the efficiency of chip verification is low. Contents of the invention [0004] The main purpose of the present invention is to provide a chip verification method, terminal equipment, verification platform and storage medium, aiming to solve the technical problems in the prior art that the chip verification process is complicated to operate...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22
CPCG06F11/2273G06F11/2205
Inventor 高峰张凡李孟周昂
Owner PENG CHENG LAB