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High-speed serial transmission data phase alignment method, storage medium and terminal equipment

A high-speed serial transmission, phase alignment technology, applied in electrical digital data processing, instruments, etc., can solve the problems of uncontrolled time to complete phase alignment, wrong end position of effective window, insufficient total delay, etc. Scale Integration, Ease of Execution, Simple to Execute Effects

Pending Publication Date: 2021-10-01
NORTHWEST INST OF NUCLEAR TECH
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  • Abstract
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Problems solved by technology

[0004] The present invention solves the phase alignment method commonly used at present. If the total delay provided by the delay module is not enough, it is easy to find the wrong end position of the effective window, even if the beginning of the effective window can be found within the total delay provided by the delay module. Position and end position, the time to complete the phase alignment is not controlled, and the technical problem is that it takes a long time to provide a high-speed serial transmission data phase alignment method, computer-readable storage medium and terminal equipment

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  • High-speed serial transmission data phase alignment method, storage medium and terminal equipment
  • High-speed serial transmission data phase alignment method, storage medium and terminal equipment
  • High-speed serial transmission data phase alignment method, storage medium and terminal equipment

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Embodiment Construction

[0029] The technical solutions of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention and the accompanying drawings. Apparently, the described embodiments do not limit the present invention.

[0030] The present invention proposes a method for phase alignment of high-speed serial transmission data. By using this method for phase alignment, the best sampling point can be accurately found. This method has low requirements on the delay range of the delay module, and only needs to be able to cover one data bit period. , easy to be integrated on a large scale and implemented on FPGA, and the time used for phase alignment is also shorter.

[0031] see figure 1 , the high-speed serial transmission data phase alignment method proposed by the present invention specifically includes the following steps:

[0032] Step 1: Determine the tap number n required by the delay module to cover a data bit period, where ...

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Abstract

The invention belongs to a phase alignment method. The method solves the problems that according to a phase alignment method commonly adopted at present, if the total delay provided by a delay module is not enough and a wrong effective window ending position is easy to find, and even if the starting position and the ending position of an effective window can be found in the total delay provided by the delay module, the time for completing phase alignment is not controlled, and the operation time is long. The invention provides a high-speed serial transmission data phase alignment method, a computer readable storage medium and terminal equipment. By traversing the n time delay units of the time delay module, the time delay required during phase alignment can be determined according to the indication bit sequence form corresponding to the n time delay units of the time delay module. Therefore, the time delay required during phase alignment is determined, the requirement for the time delay range of the time delay module is low, the execution efficiency is higher, and the steps of the phase alignment method can be executed on the computer readable storage medium and the terminal equipment.

Description

technical field [0001] The invention belongs to a phase alignment method, in particular to a phase alignment method for high-speed serial transmission data, a computer-readable storage medium and terminal equipment. Background technique [0002] High-speed serial data transmission occupies an important position and is widely used in high-speed network transmission, high-speed radar detection, high-speed data transmission, high-speed detectors and other fields. However, the delay difference inside the chip and the PCB trace difference will cause an unknown phase difference between the sampling clock and the high-speed serial data, which will cause the sampling clock to collect wrong data at an inappropriate position. Therefore, it is necessary to phase-align the sampling clock and data during high-speed serial data transmission. [0003] At present, the commonly used phase alignment method is to find the start position and end position of the effective window of the data eye...

Claims

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Application Information

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IPC IPC(8): G06F13/42
CPCG06F13/4282Y02D10/00
Inventor 周二瑞严明李刚刘璐郭明安杨少华李斌康
Owner NORTHWEST INST OF NUCLEAR TECH
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