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A bonded package and its preparation method

A package and bonding technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve the problems of bonded body function failure, bonded body easy to peel and collapse, etc.

Active Publication Date: 2021-11-02
NANTONG HUIFENG ELECTRONICS TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in the above-mentioned bonding process, there is a gap in the bonding body of the semiconductor die, which causes the bonding body to be easily peeled off and collapses, thereby causing the function failure of the bonding body

Method used

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  • A bonded package and its preparation method
  • A bonded package and its preparation method
  • A bonded package and its preparation method

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Embodiment Construction

[0035] In order to better understand the technical solutions of the present invention, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0036] The present invention proposes a method for preparing a bonded package, comprising the following steps:

[0037] Step (1): providing a first semiconductor die having through-silicon vias therein.

[0038] Step (2): disposing the first semiconductor die on the first substrate, and then performing etching on the first semiconductor die to respectively form first, second, third, and fourth bonding portions, the first, second, third, and fourth bonding portions respectively protrude from the first, second, third, and fourth bonding portions of the first semiconduc...

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Abstract

The invention relates to a bonded package and its preparation method. The first, second, third and fourth bonding parts are respectively formed around the first semiconductor die, and the first semiconductor die is formed in the first semiconductor die. A groove, the first groove exposes the through-silicon via, and a plurality of protrusions are formed on the corresponding bonding parts, and then the fifth, sixth, seventh, and the eighth bonding portion, and respectively form grooves on the corresponding bonding portions, and then bond the second semiconductor die to the first semiconductor die, so that a plurality of the protrusions are respectively embedded in the corresponding grooves in the slot. The arrangement of the above structure can improve the bonding strength of the first and second semiconductor dies, effectively prevent them from peeling off and collapsing, and provide installation space for the electrical connection of the through-silicon vias, thereby improving the stability of the electrical connection.

Description

technical field [0001] The invention relates to the field of semiconductor packaging, in particular to a bonding package and a preparation method thereof. Background technique [0002] In the existing semiconductor packaging structure, when a semiconductor die has a through-silicon via structure, it is necessary to use a chemical mechanical masking process to expose the top surface of the through-silicon via, and then pass the conductive pad of the other semiconductor die through. Solder is bonded to the TSV structure of the semiconductor die to complete the bonding of the semiconductor die. However, in the above-mentioned bonding process, there is a gap in the bonding body of the semiconductor die, which causes the bonding body to be easily peeled off and collapses, thereby causing the function failure of the bonding body. How to further improve the structure of the bonded body to prevent the bonded body from peeling off and collapsing has aroused extensive attention of re...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/60H01L21/56H01L23/31
CPCH01L21/50H01L24/81H01L21/56H01L23/3107H01L2224/8119H01L2224/81009H01L2224/81986
Inventor 宋小波石明华蔡成俊陈健
Owner NANTONG HUIFENG ELECTRONICS TECH