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Method for processing page fault by processor

A page fault, processor technology, applied in the direction of response error generation, non-redundancy-based fault handling, data processing input/output process, etc., can solve problems such as increased impact

Pending Publication Date: 2021-12-03
RES & BUSINESS FOUND SUNGKYUNKWAN UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, nowadays, as the speed of storage devices becomes higher, the influence of the delay time from the page fault handling in the operating system on the overall page fault delay increases

Method used

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  • Method for processing page fault by processor
  • Method for processing page fault by processor
  • Method for processing page fault by processor

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Embodiment Construction

[0034] While the inventive concept is susceptible to various modifications and alternative forms, specific embodiments will be described in detail with reference to the accompanying drawings. It should be understood, however, that there is no intention to limit the invention to the particular forms disclosed, but on the contrary, the invention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. In describing the drawings, similar reference numerals or numerals may be used for similar elements.

[0035] Although the terms "first", "second", etc. may be used herein with reference to various components, these components should not be construed as being limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the spirit and scope of th...

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PUM

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Abstract

Disclosed is a method for processing a page fault by a processor. The method includes performing demand paging depending on an application operation in a system including a processor and an operating system, and loading, at the processor, data on a memory in response to the demand paging.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2020-0065330 filed with the Korean Intellectual Property Office on May 29, 2020, the disclosure of which is hereby incorporated by reference in its entirety. technical field [0002] Embodiments of the inventive concepts described herein relate to a method for handling page faults by a processor. Background technique [0003] Nowadays, in a computer system environment using a page-based virtual memory technology, a demand paging technology is widely used to efficiently use memory. In conventional demand paging techniques, a demand page is generated based on the content of a page table entry corresponding to the virtual address to which the demand page is to be applied. [0004] Meanwhile, additional information (eg, swap offset) may be stored in the free bit space of the page table entry, if necessary. In this case, a processor (eg, a central processing unit (CPU)) may not be able to resolve the a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/07G06F12/1045G06F12/123
CPCG06F11/0727G06F11/0793G06F12/1045G06F12/123G06F12/1009G06F2212/1024G06F9/45558G06F11/102G06F9/546G06F9/45545G06F3/0638G06F2009/45583G06F9/30101G06F11/1068G06F11/3037G06F12/0238G06F12/0882G06F12/1081G06F2212/1021
Inventor 郑振圭李宰旭李珪善金文敬咸台俊
Owner RES & BUSINESS FOUND SUNGKYUNKWAN UNIV
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