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Compensation method and compensation device for overlay error, photoetching machine and storage medium

A technology of overlay error and compensation method, which is applied in the direction of optomechanical equipment, microlithography exposure equipment, photoplate making process exposure device, etc., and can solve the problem of low overlay accuracy, limited number of alignment marks, and limited number of overlay errors and other issues to achieve the effect of improving the accuracy of overlay engraving

Pending Publication Date: 2021-12-10
深圳天狼芯半导体有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Embodiments of the present application provide a compensation method for overlay errors, a compensation device, a lithography machine, and a storage medium to solve the problem that the number of alignment marks set on a wafer in the prior art is limited, resulting in a limited number of overlay errors , the problem of low overlay accuracy

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  • Compensation method and compensation device for overlay error, photoetching machine and storage medium
  • Compensation method and compensation device for overlay error, photoetching machine and storage medium
  • Compensation method and compensation device for overlay error, photoetching machine and storage medium

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Embodiment Construction

[0028] In the following description, specific details such as specific system structures and technologies are presented for the purpose of illustration rather than limitation, so as to thoroughly understand the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

[0029] It should be understood that when used in this specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not exclude one or more other Presence or addition of features, wholes, steps, operations, elements, components and / or collections thereof.

[0030] Reference...

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Abstract

The invention is suitable for the technical field of semiconductors, and provides a compensation method and a compensation device for an overlay error, a photoetching machine and a storage medium. The compensation method comprises the steps of determining M to-be-interpolated mark groups from N alignment marks, wherein each to-be-interpolated mark group comprises at least two alignment marks; obtaining an overlay error of the N alignment marks; for the ith to-be-interpolated mark group, enabling the ith to-be-interpolated mark group to be any one of the M to-be-interpolated mark groups, and determining the overlay error of the interpolation point corresponding to the ith to-be-interpolated mark group according to the overlay errors of all the alignment marks in the ith to-be-interpolated mark group; and performing error compensation on a wafer according to the overlay error of the N alignment marks and the overlay error of the interpolation points corresponding to the M to-be-interpolated mark groups. According to the invention, more overlay errors can be obtained on the basis of not increasing alignment marks on the wafer, error compensation is carried out on the wafer based on the overlay errors, and the overlay precision can be improved.

Description

technical field [0001] The present application belongs to the technical field of semiconductors, and in particular relates to a compensation method for overlay errors, a compensation device, a photolithography machine and a storage medium. Background technique [0002] Wafers have two important processes in the photolithography process, namely alignment and exposure. When aligning wafers, a more common method is to set alignment marks on the wafer, and to achieve wafer alignment by scanning and aligning the alignment marks. [0003] The alignment marks on the wafer can be used to search for overlay errors for error compensation and improved overlay accuracy. However, due to the limitation of the area of ​​the wafer, the number of alignment marks provided on the wafer is limited, resulting in a limited number of overlay errors and low overlay accuracy. Contents of the invention [0004] Embodiments of the present application provide a compensation method for overlay error...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G03F7/20G03F9/00
CPCG03F7/70633G03F9/7019G03F9/7046G03F9/7088
Inventor 曾健忠
Owner 深圳天狼芯半导体有限公司