Programming test method for LUT6 in FPGA
A test method and test program technology, applied in the field of programming and testing of LUT6 in FPGA, can solve the problems of reducing programming and testing times, low production efficiency, complicated process, etc., and achieve the goal of improving test efficiency, improving production efficiency, and simple implementation steps Effect
Pending Publication Date: 2022-01-28
山东芯慧微电子科技有限公司
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Problems solved by technology
[0011] The technical problem to be solved by the present invention is to provide a programming and testing method for LUT6 in FPGA, which reduces the number of programming and testing, so as to solve the problems of complex process, high cost and low production efficiency caused by manually writing test programs in traditional testing
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Embodiment 1
[0030] The programming test method of LUT6 in a kind of FPGA of the present embodiment, as image 3 As shown, perform the following steps:
[0031] 1) LUT6 logic resource function design;
[0032] 2) LUT6 input vector design;
[0033] 3) Determine the test program variable N;
[0034] 4) Automatically generate LUT6 test program through programming;
[0035] In order to cover the storage unit of the LUT6 module, the input data and the inversion data of the input data are automatically generated through programming, and automatically converted into hexadecimal. Set the initial input vector manually, and automatically generate multiple LUT6S combinations through programming. According to the number of storage units, there are N LUT6S combinations. In order to automatically generate the LUT6 test program;
[0036] 5) Automatically transplant the automatically generated LUT6 test program to the LUT6 test tool through programming;
[0037] 6) Perform test simulation;
[0038...
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The invention relates to a programming test method for an LUT6 in an FPGA, and belongs to the technical field of testing of LUT6 in a field programmable gate array. The method comprises the following steps: 1), carrying out LUT6 logic resource function design; 2), designing an LUT6 input vector; 3), determining a test program variable N; 4), automatically generating an LUT6 test program through programming; 5) ,automatically transplanting the automatically generated LUT6 test program into the LUT6 test tool through programming; 6), carrying out test simulation; 7), writing a LUT6 test program into an FPGA and carrying out data reading; 8), comparing simulation data with read data in the FPGA; and 9) determining a test device. According to the method, the LUT6 module is fully covered, the test efficiency is improved, and the problem that Verilog is instantiated for multiple times in a traditional test is solved by adopting an online programming mode.
Description
technical field [0001] The invention relates to a method for programming and testing LUT6 in FPGA, and belongs to the technical field of testing LUT6 in Field Programmable Gate Arrays (Field Programmable Gate Arrays, FPGA). Background technique [0002] Field Programmable Gate Arrays (FPGA) is a commonly used electronic device at present, which has the characteristics of programmable, easy application and wide application range. [0003] At present, domestic testing agencies basically adopt application-based testing technology for FPGA testing, that is, conformity testing of its functions, which is a functional verification test based on automated testing systems. The testing process is shown in Figure 1. [0004] The core of the programmable logic resource is the programmable logic function block (CLB), among which the look-up table (LUT) module is an important part of it. In the test, it mainly judges the correctness of its composition and sequence circuit. [0005] A l...
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IPC IPC(8): G01R31/3177
CPCG01R31/3177
Inventor 刘铮张超
Owner 山东芯慧微电子科技有限公司