FinFET device and forming method of gate structure thereof

Abstract

The invention provides a method for forming a gate structure of a FinFET device, and the method comprises the steps: providing a substrate, and forming fins on the substrate; a sacrificial layer and a stop layer are sequentially formed, the sacrificial layer covers the outer walls of the fins and the surface of the substrate, and the stop layer covers the sacrificial layer; forming a virtual grid electrode, wherein the virtual grid electrode partially covers the isolation layer and the substrate; etching a part of the virtual gate to form a deep groove exposing the substrate, forming an isolation wall in the deep groove, and cutting off the virtual gate by the isolation wall; and removing the virtual gate, the stop layer and the sacrificial layer to form a gate structure. By using the sacrificial layer and the stop layer covering the fin, the distance between the deep groove and the fin can be ensured by using the stop layer when the virtual gate is etched to form the deep groove, so that the isolation wall formed in the deep groove keeps a proper distance from the fin to have an effect similar to self-alignment, the isolation wall is prevented from excessively shifting, and the reliability of the device is improved. And the yield of the subsequent process can be improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to a method for forming a FinFET device and a gate structure thereof. Background technique [0002] With the continuous development of semiconductor technology, traditional planar devices have been difficult to meet people's demand for high-performance devices. Fin Field Effect Transistor (Fin-Field-Effect-Transistor, FinFET) is a three-dimensional device, including fins formed vertically on the substrate and a high dielectric constant metal gate (HKMG) intersecting the fins. The design can greatly improve circuit control and reduce leakage current, and can also greatly shorten the gate length of transistors. [0003] Currently, a replacement metal gate (RMG) process is usually used to form the gate structure, for example, a dummy gate (also called a dummy gate) is formed first, and then the dummy gate is removed to form the gate structure. Please refer to...

AI Technical Summary

Problems solved by technology

It should be noted that the above-mentioned reduced window 240' will have adverse effects in many subsequent processes. For example, when the dummy gate is removed, the dummy gate is very likely to remain in the window 240', thereby affecting the product yield.

Images