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Data reading method of group-to-structure non-volatile memory array

A non-volatile storage and data reading technology, applied in the storage field, can solve problems such as data changes, exceptions, and data inconsistencies

Active Publication Date: 2022-05-03
杭州领开半导体技术有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although a single voltage applied to the word line has little influence on the data stored in the memory tube, in practical applications, the data stored in the same memory array is generally read multiple times, for example, one hundred thousand to one million The number of times data is read, and the small interference generated by each read will accumulate gradually with the increase of the number of reads, which may eventually cause changes or abnormalities in the data stored in the storage array, resulting in the read data and The stored data is inconsistent, and information reading errors occur. This phenomenon is usually called "Read Disturb" in the field of non-volatile memory.

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Embodiment Construction

[0024] Before the introduction of the data reading method of the non-volatile storage array with group pair structure of the present invention. Firstly, the non-volatile storage array with group-pair structure is introduced.

[0025] figure 1 It is an architectural diagram of a non-volatile storage array with a pair structure. like figure 1 As shown, the non-volatile memory array includes multiple pairs of memory cells 10 arranged in rows and columns, and the pairs of memory cells 10 in the same column correspond to the same two bit lines (Bit Line, BL); each of the The pair storage unit 10 includes a pair of first storage tubes 11 and second storage tubes 12 arranged in a column direction, the sources of the first storage tubes 11 and the second storage tubes 12 are connected, and the The drain of the first storage tube 11 is connected to one of the corresponding two bit lines, and the drain of the second storage tube 12 is connected to the other corresponding one of the t...

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Abstract

In the data reading method of the nonvolatile memory array with group-pair structure of the present invention, in the first data reading period, the word line of the first storage tube of the selected memory cell applies zero volts voltage and the word line of the second storage tube Apply a turn-on voltage, and apply a compensation positive voltage to the word line of the first storage tube of the unselected memory cell in a row different from the selected memory cell, and apply a turn-off negative voltage to the word line of the second storage tube; in the second data read cycle, the selected The word line of the second storage tube of the memory cell applies a zero volt voltage while the word line of the first storage tube applies a turn-on voltage, and the word line of the second storage tube of an unselected memory cell applies a compensation positive voltage while the word line of the first storage tube Apply a shutdown negative voltage. Through the cooperation of two data read cycles, the soft erase effect generated by turning off the negative voltage can be compensated by the soft program effect generated by the positive voltage, thereby reducing the read time without adding additional circuits and read cycle time. probability of interference occurring.

Description

technical field [0001] The invention relates to the field of storage technology, in particular to a data reading method of a pair-structure non-volatile storage array. Background technique [0002] For a non-volatile (or non-volatile, Nonvolatile) semiconductor memory chip, after data is written, it can still maintain the stored data information even if it is powered off. Generally speaking, a non-volatile memory (that is, a non-volatile memory array) has a plurality of memory tubes arranged in rows and columns. In the process of actually reading non-volatile memory data, in order to identify the data stored in the selected storage tube, a voltage of corresponding magnitude is usually applied to the bit line of the selected storage tube or to both the bit line and the word line at the same time. Another word line voltage will be applied to the unselected memory tubes, and the voltages applied to the selected word lines and the unselected word lines will slightly interfere w...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/08G11C16/26G11C16/34
CPCG11C16/08G11C16/26G11C16/3404
Inventor 禹小军金波
Owner 杭州领开半导体技术有限公司
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