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Memory device for handling row hammer refresh operation and method of operating same

A technology of memory and memory unit, which is applied in the direction of static memory, read-only memory, digital memory information, etc., and can solve the problems of memory unit charge increase and data loss

Pending Publication Date: 2022-04-01
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As the manufacturing process of memory devices is scaled down, the spacing between word lines decreases, and therefore, the voltage distribution in one word line may cause an increase in the charge of memory cells connected to word lines adjacent to the one word line
When one word line is intensively accessed, a row hammer phenomenon may occur in which data stored in memory cells connected to an adjacent word line is lost due to the voltage of the active state of the one word line

Method used

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  • Memory device for handling row hammer refresh operation and method of operating same
  • Memory device for handling row hammer refresh operation and method of operating same
  • Memory device for handling row hammer refresh operation and method of operating same

Examples

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Embodiment Construction

[0022] Hereinafter, embodiments of the inventive concept will be described in detail with reference to the accompanying drawings.

[0023] figure 1 is a block diagram of a memory system according to an embodiment of the inventive concept.

[0024] refer to figure 1 , the memory system may include a memory device 10 and a memory controller 20 . The memory controller 20 may transmit / receive data to / from the host device HOST, and may transmit a command CMD and an address ADDR to the memory device 10 . The memory controller 20 may include a command generator 21 , an address generator 22 , a device interface 23 and a host interface 24 . The host interface 24 can receive the command CMD and the address ADDR from the host device HOST, and the command generator 21 can generate an access command and a line hammer refresh command by decoding the command CMD received from the host device HOST, and can send the memory device 10 to the memory device 10 through the device interface 23. ...

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Abstract

A memory device includes: a memory cell array including a plurality of memory cell rows; an address buffer configured to store an address of a target row of the plurality of memory cell rows, where the address of the target row has been repeatedly accessed; a minimum access output circuit configured to select, as a minimum access row, any one of a plurality of rows having the same minimum access count based on the selection command value when the plurality of rows have the same minimum access count among the target rows, and configured to output an index value of the minimum access row; and a control circuit configured to output a command indicating that an address corresponding to the index value of the fewest access row is replaced with an address of the access row and the address of the access row is stored in the address buffer.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to Korean Patent Application No. 10-2020-0119313 filed with the Korean Intellectual Property Office on September 16, 2020, the disclosure of which is hereby incorporated by reference in its entirety. technical field [0003] The inventive concepts relate to memory devices, and more particularly, to memory devices configured to perform row hammer refresh operations and methods of operating the same. Background technique [0004] Volatile memory devices such as dynamic random access memory (DRAM) determine data by using electrical current stored in capacitors. For example, DRAM stores each bit of data in a capacitor. However, since the current stored in the capacitor may leak over time, the volatile memory device periodically performs a refresh operation. In other words, data is periodically rewritten into the capacitor. As the manufacturing process of memory devices is scaled down, th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/406
CPCG11C16/3427G11C11/40622G11C11/40626G11C11/406G11C11/4082G11C11/4087G11C16/08G11C11/40611G11C11/4076G06F7/58G06F3/0658G06F3/0659G11C7/1012G11C7/1036G11C29/783
Inventor 崔孝真高在元金亨泰朴润植孙贤植
Owner SAMSUNG ELECTRONICS CO LTD