Nonlinear feedback shift register

A technology of linear feedback shifting and nonlinear feedback, which is applied to encryption devices with shift registers/memory, instruments, random number generators, etc., and can solve problems such as unstable registers

Pending Publication Date: 2022-04-01
IBM CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This frees the register from the rigidity of Galois, Fibonacci and other predetermined taps, but then one must ensure that lockup does not occur and the register does not settle into the pattern

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Embodiment Construction

[0055] The described methods and systems provide a non-linear feedback shift register (NLFSR) with a sequence of maximum or near maximum length for generating a pseudo-random sequence for a number of registers with n stages that are shifted in linear feedback More than two taps are required in a bit register (LFSR) for maximum length, typically four or more taps. The four taps in the LFSR use three XOR gates.

[0056] Maximum length sequence is 2 n -1, where the missing state is all 0s, or all 1s for complement logic operations. In this specification, near maximum is defined as being less than 4% off the maximum length.

[0057] The method and system have been tested up to n=24, and for n=8 and n=12 for n-stage register banks requiring more than two taps for maximal length sequences in a linear feedback arrangement in LFSR, using the described Nonlinear feedback to achieve maximum length sequences. However, for n>24, there may also be other n-stage registers where the maxi...

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Abstract

The invention provides a method and a system for generating n stages of pseudorandom sequences at least close to a maximum length using a non-linear feedback shift register (NLFSR), wherein the maximum length is 2n-1. The method comprises the following steps of: selecting n taps in the maximum-length linear feedback shift register, wherein n needs more than two taps; and for the selected n-level registers, generating a pseudorandom sequence by using a feedback logic operation of only the first logic gate and the second logic gate. The two suitable non-end taps are inputs for the first logic gate, the output of the first logic gate and the end tap are inputs for the second logic gate, and the output of the second logic gate serves as feedback to the first stage of the n-stage register.

Description

Background technique [0001] This invention relates to feedback shift registers, and more particularly, to nonlinear feedback shift registers with sequences of maximum or near maximum length. [0002] In the field of digital electronic circuits, the linear feedback shift register (LFSR) is used to generate 2 n - means of 1 pseudo-random bit sequence. LFSRs have many applications including cryptography, for example where they are used in keystream generators, data compression, error detection and correction, etc. [0003] LFSRs are shift registers whose input bits are a linear function of their previous state. The most commonly used linear function of individual bits is exclusive OR (XOR), and a shift register has an input bit driven by the XOR of some bits of the entire shift register value. Both hardware and software implementations of LFSRs are common. [0004] The bit positions that affect the next state are called taps. The rightmost bit of the LFSR is called the outpu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/26H04L9/06G06F7/58
CPCG06F7/584
Inventor A·约翰逊
Owner IBM CORP
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