Method for increasing FinFET device contact hole and grid bridging process window

Abstract

The invention provides a method for increasing a FinFET (FinFET) device contact hole and gate bridging process window, which comprises the following steps: providing a substrate, forming a fin structure on the substrate, the fin structure comprising a gate and an upper layer structure formed at the top end of the gate, and forming a protective layer covering the surface of the fin structure; the protective layer is doped, so that the dielectric constant of the protective layer is reduced, and the oxidation resistance and the etching resistance are enhanced; and removing the upper-layer structure at the top end of the gate and the protective layer on the surface of the upper-layer structure, and retaining the protective layer on the side wall of the gate to form a side wall structure which protects the gate. According to the method, ion implantation is carried out on the surface of the SIOCN, so that the SIOCN side wall with low k, oxidation resistance and etching characteristics is formed, and a window of a contact hole and grid electrode bridging process is enlarged.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for increasing the contact hole and gate bridging process window of a FinFET device. Background technique [0002] As device dimensions continue to shrink, process limits are increasingly apparent, especially in the case of contact-to-metal gate (MG) shorts. When entering the 14nm technology node, the distance between the contact hole and the gate is continuously reduced, resulting in an increase in parasitic capacitance. The increase of parasitic capacitance not only reduces the sensitivity of the sensor, but also leads to the unstable operation of the instrument, which greatly affects the AC characteristics of the device. The FinFET process often uses SIOCN with a small dielectric constant (k~5) instead of SIN (k~8) as a side wall to reduce parasitic capacitance, but because SIOCN has weak oxidation resistance, after being oxidized, in subsequent integration st...

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Problems solved by technology

However, the experiment found that the C content can only be adjusted at a maximum of about 8%, and it has reached a saturated state, but a higher C content cannot be achieved through recipe adjustment.

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