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Planar power MOSFET device integrated with junction barrier Schottky diode

A junction barrier Schottky and diode technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as partial conflicts in active regions

Pending Publication Date: 2022-04-26
海科(嘉兴)电力科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The embodiment of the present application provides a planar power MOSFET device with an integrated junction barrier Schottky diode, which is used to solve the problem that the existing junction barrier Schottky cells and MOSFET cells occupy the active region of the device together. There are conflicting technical issues
[0007] The planar power MOSFET device with integrated junction barrier Schottky diode provided by the embodiment of the present application not only solves the existing junction barrier Schottky cell and MOSFET cell fusion through the special design The special base cell and the MOSFET cell have the problem of conflict when they jointly occupy the active area of ​​the device, and it also ensures that the junction barrier Schottky diode has a relatively high performance under the premise of small MOSFET device conduction loss. High current conduction capability

Method used

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  • Planar power MOSFET device integrated with junction barrier Schottky diode
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Embodiment Construction

[0027] In order to make the purpose, technical solution and advantages of the present application clearer, the technical solution of the present application will be clearly and completely described below in conjunction with specific embodiments of the present application and corresponding drawings. Apparently, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0028] The embodiment of the present application provides a planar power MOSFET device with an integrated junction barrier Schottky diode, which is used to solve the problem that the existing junction barrier Schottky cells and MOSFET cells occupy the active region of the device together. There are conflicting technical issues

[0029] The technical ...

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Abstract

The invention discloses a planar power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device integrated with a junction barrier Schottky diode, which is used for solving the technical problem that conflicts exist when existing junction barrier Schottky cells and MOSFET cells jointly occupy an active region part of the device. The device comprises an epitaxial layer and a plurality of cells which are distributed on the first side surface of the epitaxial layer and have the same shape and structure, each cell at least comprises a well region, a source region, highly-doped P-type regions and a junction barrier Schottky region comprising a preset number of highly-doped P-type regions; a junction field effect transistor (JFET) region is formed between the well regions; a first PN junction is formed between the well region and the epitaxial layer, and a second PN junction is formed between the well region and the source region; a preset number of highly doped P-type regions in the junction barrier Schottky region and the epitaxial layer form a third PN junction; the value range of the distance between the JFET region and the highly doped P-type region is in the same preset interval. Through the device, the problem that conflicts exist when junction barrier Schottky cells and MOSFET cells jointly occupy the active region part of the device is solved.

Description

technical field [0001] The present application relates to the technical field of power semiconductor manufacturing, in particular to a planar power MOSFET device integrating junction barrier Schottky diodes. Background technique [0002] There are basal plane dislocations (BPD) in silicon carbide crystals, and under certain conditions, basal plane dislocations (BPD) can be transformed into stacking faults (SF). When the body diode in a SiC power MOSFET device is turned on, under bipolar operation, the electron-hole recombination will continue to expand the stacking fault (SF), and bipolar degradation occurs. This phenomenon increases the turn-on voltage resistance of the silicon carbide power MOSFET, increases the leakage current in blocking mode, and increases the turn-on voltage drop of the body diode, thereby reducing the reliability of the device. [0003] In practical circuit applications, in order to avoid bipolar degradation, designers generally use external anti-par...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/06
CPCH01L29/7804H01L29/0615
Inventor 于霄恬
Owner 海科(嘉兴)电力科技有限公司
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