Chip connection method and device, computer equipment and computer readable storage medium

Abstract

The invention relates to a chip connection method and device, computer equipment and a computer readable storage medium. The method comprises the steps of obtaining a file list of a chip, connection key point description between two modules to be connected and a signal list to be added; based on the signal list, extracting a signal direction, a signal bit width and a signal name, and generating a corresponding code snippet; based on the file list, establishing a mapping list from a file name to a module name and then to a port declaration starting line number; performing text retrieval on the files of the chip, and determining a unique connection path between the source point module and the end point module and each passed file; and determining a corresponding code insertion position in each passed file, and inserting a corresponding code snippet to complete module connection. According to the technical scheme, connection and text modification between the modules can be automatically carried out on the chip, so that the problems that connection between the modules of the chip designed hierarchically is complex, errors are likely to occur, and labor waste is likely to be caused are solved.

Description

technical field [0001] The invention relates to the technical field of chip manufacturing, in particular to a chip connection method and device, computer equipment, and a computer-readable storage medium. Background technique [0002] As the scale of the chip becomes larger and larger, the concept of hierarchical design (hierarchy design) is introduced. Starting from the planning of the chip, the concept of hierarchy runs through the entire design process and packaging. When the chip design is relatively complex and the hierarchy is relatively deep, the connection relationship between two modules in the chip spans more layers and involves more modules. When the interface between two modules in the chip needs to be changed, if the respective levels of the two modules are relatively deep, the number of files / modules and text modification points involved in the modification will also be relatively large. Such modification is cumbersome and error-prone, which increases the work...

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to address at least some of the above-mentioned deficiencies, and provide a technical solution for automatically connecting lines between chip modules and modifying text, so as to solve the problem that the lines between chip modules in a hierarchical design are complicated, error-prone, and artificial. waste problem

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