Semiconductor packaging structure and manufacturing method thereof

Abstract

The invention provides a semiconductor package structure and a method for manufacturing the semiconductor package structure. The semiconductor package structure includes a carrier, a first encapsulation, and an interposer. The first encapsulation is on the carrier and defines a cavity. The interposer is disposed between the first encapsulation body and the cavity. The first encapsulation covers a portion of the interposer.

Description

technical field [0001] The present disclosure generally relates to semiconductor package structures and methods for fabricating semiconductor package structures. Background technique [0002] As the technology of packaging technology advances faster and faster, the size of the package is reduced, and various structures are developed. For example, MEMS packaging has the advantages of high strength, high performance and low cost; therefore, the development of MEMS packaging is becoming more and more important in packaging technology. [0003] Open cavity packages (eg, OCQFN and OCDFN) are widely used in IC packaging and IC assembly. However, some partially embedded dies may be sensitive to stresses generated during the molding operation and / or caused by the molding stock itself. On the other hand, even for open cavity packages of the type that do not apply molding stock directly to the semiconductor die, the aforementioned package structures can be difficult to implement at ...

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Problems solved by technology

However, some partially embedded die may be sensitive to stresses generated during the molding operation and / or caused by the molding stock itself

On the other hand, even for open-cavity packages of the type that do not apply the molding compound directly to the semiconductor die, the aforementioned package structure may be difficult to implement at high I / O due to its limited connection lead counts design. Semiconductor chips with I / O counts

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