Unlock instant, AI-driven research and patent intelligence for your innovation.

Method for quickly generating PCIe UVM verification platform

A verification platform and fast technology, applied in the fields of instrumentation, error detection/correction, calculation, etc., can solve problems such as hindering the progress of chip verification, low efficiency, and difficulty in building a chip verification platform, so as to improve efficiency and reduce the probability of errors. Effect

Pending Publication Date: 2022-06-10
芯河半导体科技(无锡)有限公司
View PDF0 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Most of the verification platforms are built based on the UVM verification methodology. With the increase of the chip scale, it becomes more and more difficult to build the chip verification platform. The traditional PCIe UVM verification platform is manually written code, resulting in The efficiency is very low, which seriously hinders the progress of chip verification

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for quickly generating PCIe UVM verification platform
  • Method for quickly generating PCIe UVM verification platform

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0050] cfg folder: what is stored under this folder is the configuration information of the entire verification platform, such as register addresses and the like.

[0051] Duv folder: what is stored under this folder is all the filelist list information of the entire verification platform.

[0053] SVA folder: This folder is used to store the SVA of the entire verification platform.

[0055] Testcase folder: this folder is used to store the testcase required for verification, and here is a generated

[0062] The reference model and result comparison module (scoreboard) are also integral parts of the chip verification platform. Book

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

According to the method for rapidly generating the PCIe UVM verification platform, the Perl script is used for constructing the universal framework of the PCIe UVM verification platform, and the framework of the PCIe UVM verification platform can be generated only by inputting the unique part of the verification platform according to the prompt in the using process, so that the efficiency of constructing the verification platform can be greatly improved; and the probability of errors in the process of establishing the verification platform can be greatly reduced.

Description

A Method to Quickly Generate PCIe UVM Verification Platform technical field [0001] The present invention relates to the technical field of IC verification, in particular to a method for rapidly generating a PCIe UVM verification platform. Background technique In recent years, my country's integrated circuit (IC) industry has developed rapidly, and the functions realized by chips have become more and more powerful. The size of the film grew rapidly. The verification of digital integrated circuits is the key technology to improve the success of first-time tape-out of design chips. With the refinement of the chip manufacturing process, the manufacturing cost of the chip is also increasing, facing the increasingly complex chip system With the highly integrated approach of design and IP, the importance of chip verification is also increasing. [0003] PCIe (peripheral component interconnect express) is different from the previous IO bus. Use a serial, point-to-point inte...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/273G06F13/42
CPCG06F11/273G06F13/4221
Inventor 杨爱丽
Owner 芯河半导体科技(无锡)有限公司