Multi-chip packaging structure and manufacturing method thereof
A technology of multi-chip packaging and manufacturing method, which is applied in the direction of semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., to achieve the effects of improving heat dissipation efficiency, improving stability, and suppressing thermal crosstalk.
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[0020] see Figure 1-Figure 4 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of the present invention, so that only the components related to the present invention are shown in the diagrams rather than the number, shape and Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual implementation, and the component layout type may also be more complicated.
[0021] like Figure 1-Figure 4 As shown, the present invention also proposes a method for manufacturing a multi-chip packaging structure, comprising the following steps:
[0022] In a specific embodiment, the first chip 201 , the second chip 202 , the third chip 203 , and the fourth chip 204 may be chips with the same function or chips with different functions. Further, the heat production of the first chip 201, the second chip 202, the third chip 203, and the fourth chip 204 are different. In ...
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