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DMA controller and method

A DMA controller and controller technology, applied in the direction of instrumentation, electrical digital data processing, etc., can solve the problems of low data transmission efficiency, inability to meet multi-dimensional data, and large time consumption, so as to improve data transmission performance, high-efficiency data transmission, The effect of meeting the needs of multidimensional data

Pending Publication Date: 2022-07-22
SHENZHEN CORERAIN TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The DMA controller of prior art often can only carry out the data transmission of continuous address when controlling internal memory and external memory to carry out data transmission, and the data address of multi-dimensional data is discontinuous, so the controller of DMA in the prior art needs Start the DMA controller multiple times to transmit multi-dimensional data, but each time the DMA controller is started and interrupted, it takes a lot of time and takes up CPU resources to control the start and stop of the DMA controller, which leads to a decrease in data transmission performance and data transmission The efficiency is too low to meet the needs of multidimensional data in neural computing

Method used

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Experimental program
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Embodiment 1

[0020] figure 1 It is a schematic diagram of a DMA controller provided by the first embodiment of the present invention. This embodiment can be applied to the situation of data transmission, and can generally be integrated in a computer, such as figure 1 shown:

[0021] Specifically, the DMA controller may include: a control status register 110 (Control Status Register, CSR), a read controller 120 (read control), and a data buffer register 130 (date buffer), wherein:

[0022] The control state register 110 is used to store the control instruction corresponding to the preset transmission mode.

[0023] The preset transmission mode may be a transmission mode preset according to the multi-dimensional data transmitted by the DMA controller. The control instruction may be an instruction that the CPU sends to the DMA controller through the bus to transmit multi-dimensional data. It can be understood that the DMA controller obtains the data address and transmission direction of the...

Embodiment 2

[0038] This embodiment is embodied on the basis of the above-mentioned embodiment, and further describes the control instruction of the preset transmission mode including multi-dimensional data in the DMA controller in the above-mentioned embodiment, wherein the control instruction at least includes: the reference address of the multi-dimensional data , the first cycle offset, the first cycle upper limit, and the second cycle upper limit, where:

[0039]The reference address of the multi-dimensional data may be the data address where the multi-dimensional data is stored; the upper limit of the first cycle may be the upper limit of the number of multi-dimensional data read by the first cycle; the upper limit of the second cycle may be the upper limit of the number of multi-dimensional data read by the second cycle Quantity; the first cycle offset may be the offset of the reference address after the first cycle read ends.

[0040] Step 1: Read the reference address of the multi-...

Embodiment 3

[0065] image 3 This is a schematic diagram of a DMA control method provided by Embodiment 3 of the present invention. This embodiment is applicable to the case of DMA control data transmission. The method can be executed by a DMA controller, which can generally be integrated in a computing device. like image 3 As shown, the method includes the following steps:

[0066] S210: Control the read controller to read multi-dimensional data from the external storage unit according to the control instruction.

[0067] S220, caching the multi-dimensional data in the data buffer register at one time;

[0068] S230. After the multi-dimensional data cache is completed, the read controller sends the multi-dimensional data to the memory at one time.

[0069] Optionally, the method further includes:

[0070] Controlling the write controller to obtain the multi-dimensional data from the data buffer register at one time according to a control instruction;

[0071] After the multi-dimensi...

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Abstract

The embodiment of the invention discloses a DMA (Direct Memory Access) controller and method, the controller comprises a control state register, a read controller and a data buffer register, the control state register is used for storing a control instruction corresponding to a preset transmission mode; the read controller reads multi-dimensional data from an external storage unit according to the control instruction; the data buffer register is used for caching the multi-dimensional data at one time, and the read controller sends the multi-dimensional data to a memory at one time after the multi-dimensional data is cached. According to the technical scheme, one-time configuration can be carried out on the DMA controller, complete storage of the multi-dimensional data is achieved, and the access efficiency of the multi-dimensional data is improved.

Description

technical field [0001] Embodiments of the present invention relate to the field of DMA (Direct Memory Access, direct memory access) data transmission, and in particular, to a DMA controller and method. Background technique [0002] The DMA controller is a device used in the computer system for data transmission between the CPU and external devices. Through the DMA controller, the internal memory of the computer system and the external memory can be used for high-speed data transmission to each other. The DMA controller in the prior art can often only perform data transmission with continuous addresses when controlling the internal memory and the external memory for data transmission, and the data addresses of the multi-dimensional data are discontinuous, so the DMA controller in the prior art needs to be The DMA controller is started multiple times to transfer multi-dimensional data, and each startup and interruption of the DMA controller consumes a lot of time, and occupies...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16G06F13/28
CPCG06F13/28G06F13/1673
Inventor 曾成龙蔡权雄牛昕宇
Owner SHENZHEN CORERAIN TECH CO LTD
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