Formation method of semiconductor structure

Abstract

A method for forming a semiconductor structure comprises the following steps: providing a layer to be etched; a first sacrificial layer is formed on the surface of the to-be-etched layer, a first opening extending in the first direction is formed in the first sacrificial layer, and the first opening exposes the surface of the to-be-etched layer; forming an initial second sacrificial layer on the first sacrificial layer and in the first opening; forming an initial first mask layer on the surface of the initial second sacrificial layer; a plurality of patterning steps are carried out on the initial first mask layer to form a first mask layer, a plurality of partition mask openings distributed in the first direction are formed in the first mask layer, each partition mask opening stretches across the first opening in the second direction, and the second direction is perpendicular to the first direction. Therefore, adjacent patterns with small spacing and good morphology can be transmitted to the to-be-etched layer.

Description

technical field [0001] The present invention relates to the field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] With the improvement of circuit integration and the increase of scale, the size of the unit device in the circuit continues to shrink, and the requirements for the integrated circuit manufacturing process continue to increase. high. [0003] With the continuous reduction of the design size, the minimum resolution of the design pattern has exceeded the limit capability of the existing optical lithography platform. The industry has adopted a variety of technical solutions to solve this technical problem. According to the international semiconductor technology blueprint, Double patterning technology (DPT), extreme ultraviolet technology (EUV), electron beam direct writing (EBL) and other technical solutions have been placed high hopes by the industry. [0004] However, with the further ...

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Problems solved by technology

[0004] However, with the further improvement of the integration of semiconductor structures, the distance between two adjacent design patterns needs to be further reduced, and the size of the distance exceeds the limit of the existing photolithography process, or is close to the existing photolithography process limit, leading to the fact that adjacent patterns with small pitches cannot be formed, or the morphology of many adjacent patterns with small pitches is poor

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