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Semiconductor device with mixed gate/electrical interruption and method of manufacturing same

A semiconductor and device technology, applied in the field of stacked transistor structures, can solve the problems of difficulty in constructing 3DIC, undesired formation of cutting two or more levels of transistor diffusion interruption, etc.

Pending Publication Date: 2022-07-29
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, difficulties may arise when building 3D ICs because it may not be desirable to form diffusion breaks that cut two or more levels of transistors

Method used

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  • Semiconductor device with mixed gate/electrical interruption and method of manufacturing same
  • Semiconductor device with mixed gate/electrical interruption and method of manufacturing same
  • Semiconductor device with mixed gate/electrical interruption and method of manufacturing same

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Embodiment Construction

[0019] The example embodiments described herein are examples, and thus, the present disclosure is not limited thereto and may be implemented in various other forms. It does not preclude that each example embodiment provided in the following description is associated with one or more features of another example or another example implementation provided herein or not provided herein but consistent with the present disclosure. For example, even if an item described in a particular example or example implementation is not described in a different example or example implementation, the matter can be construed as related to or in combination with the different example or implementation unless described otherwise. mentioned otherwise.

[0020] In addition, it should be understood that all descriptions of principles, aspects, examples, and example embodiments are intended to encompass structural and functional equivalents thereof. Additionally, these equivalents should be understood...

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Abstract

Semiconductor devices with mixed gate / electrical disruption and methods of making the same are presented that allow electrical or diffusion disruption between transistor devices of one level of stacked transistor devices without having to require the presence of similar electrical or diffusion disruption in another level of stacked transistor devices. It is also proposed that an electrical interruption between transistor devices may be formed by providing a channel of a first polarity and a dummy gate comprising work function metals of opposite polarity.

Description

technical field [0001] The present invention relates generally to stacked transistor structures, and more particularly, to structures and methods for selectively providing electrical and diffusional interruptions between stacked transistors. Background technique [0002] This Background section is merely intended to provide those skilled in the art with a background for understanding the inventive concepts disclosed herein. Accordingly, this Background section may contain patentable material and its inclusion in this section should not be taken as an admission that the art already exists. [0003] Diffusion disruption in semiconductor devices generally brings two different functions to the semiconductor device. First, they provide enhanced electrical isolation for adjacent transistor devices, and second, they provide a barrier to the diffusion of dopants or contaminants from one transistor to another. Diffusion interruptions typically consist of bulk dielectric material th...

Claims

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Application Information

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IPC IPC(8): H01L27/06H01L27/092H01L21/8238
CPCH01L27/0688H01L27/0924H01L21/823828H01L21/823821H01L21/8221H01L21/823842H01L21/823878H01L27/092H01L21/823857H01L29/785H01L29/66545H01L29/401H01L29/402H01L29/4916H01L29/495H01L29/4966
Inventor 洪炳鹤宋昇炫河大元徐康一J.马蒂诺
Owner SAMSUNG ELECTRONICS CO LTD
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