Data pack preprocessing method and bus interface and data processing unit thereof

A bus interface unit and processing unit technology, applied in the direction of electrical digital data processing, bus network, data exchange network, etc., can solve the problem of performance degradation and achieve the effect of software simplification

Inactive Publication Date: 2004-05-05
DEUTSCHE THOMSON-BRANDT GMBH
View PDF0 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But the disadvantage of this solution is that if the destination microcontroller is little-endian, it has to include th

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Data pack preprocessing method and bus interface and data processing unit thereof
  • Data pack preprocessing method and bus interface and data processing unit thereof
  • Data pack preprocessing method and bus interface and data processing unit thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0032] First, explain the meaning of the two words big endian and little endian.

[0033] Big-endian and little-endian are two terms that describe the order in which a sequence of bytes is stored in computer memory. Big endian is the order in which "big endian" (the most significant byte value in the sequence) is stored first (lowest bit storage address). Little endian is the order in which "little endian" (the least significant byte value in the sequence) is stored first. For example, in a big-endian computer, the hexadecimal number 0x4F52, the required two bytes, is stored in the memory as 0x4F52 (for example, 0x4F) is stored at address 1000, and 0x52 will be stored as 0x524F (0x52 at address 1000, 0x4F at address 1001).

[0034]As already stated above in the introduction, multi-byte data words are often present in electronic devices. A quad segment data word consisting of 4 bytes or corresponding 32 bits is an example. For example, the IEEE1394 bus is structured in a pl...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The IEEE1394 bus communication protocol has three layers: physical layer, link layer, and transaction layer. A link layer IC implements the interface to an external application and prepares data for sending on the bus, or interprets incoming data packets from the IEEE1394 bus. A physical layer IC implements the direct electrical connection to the bus and controls many functions including arbitration for sending data on the bus. A problem exists due to the fact that the header data of the IEEE1394 asynchronous data packets consists of 32 bit words which have to be interpreted as 32 bit words in the connected application data processing unit (30). The IEEE1394 bus interface unit (20) is defined to be of big endian type. In a little endian type application data processor (30) the data word order can only be correctly interpreted after a byte order change. According to the invention the byte order change is performed in the data link layer unit (21) automatically with hardware circuitry for asynchronous data packets.

Description

Background technique [0001] The invention relates to a method for preprocessing data packets received via a communication bus in a bus interface unit, to a bus interface unit used in such a method, and to an application data processing unit used in such a method. Background technique [0002] A highly complex communication bus is the IEEE 1394 bus, which is a low-ratio, high-performance serial bus. It has a read / write memory structure and a highly complete communication protocol. Data rates of 100, 200 or 400 Mbit / s can be transmitted in near real time. At the same time, data can be sent bi-directionally. The first ten bits of the transmitted address value refer to one of up to 1023 possible clusters of the IEEE 1394 bus. The next six bits of the address value that is sent refer to one of up to 63 nodes within the private cluster to which the corresponding application or device is assigned. Data between nodes can be exchanged without interacting with the controller. The...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F13/12H04L12/40H04L12/64H04L29/06
CPCH04L29/0653H04L12/40117H04L69/22H04L12/40
Inventor 托马斯·布吕内拉尔夫·奥斯特曼延斯·卡恩布里西格弗里德·施魏德勒
Owner DEUTSCHE THOMSON-BRANDT GMBH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap