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Structure of mask ROM and method for manufacturing the same

A read-only memory and manufacturing method technology, applied in semiconductor/solid-state device manufacturing, electrical solid-state devices, semiconductor devices, etc., can solve problems such as ion concentration changes, critical dimension deviations, coding mask alignment errors, etc., to reduce manufacturing costs. cost, the effect of improving the manufacturing process margin

Inactive Publication Date: 2006-06-14
MACRONIX INT CO LTD
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  • Claims
  • Application Information

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Problems solved by technology

However, boron ions implanted in the channel region easily diffuse into the buried bit lines on both sides
In addition, if the code mask used in the code implantation process has misalignment or critical dimension deviation, the code ions originally planned to be implanted in the channel region will also diffuse to the buried bit line. middle
The above two situations will cause the ion concentration in the buried bit line to change, so that the current of the buried bit line will be insufficient.

Method used

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  • Structure of mask ROM and method for manufacturing the same
  • Structure of mask ROM and method for manufacturing the same
  • Structure of mask ROM and method for manufacturing the same

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Embodiment Construction

[0022] Figure 1A to Figure 1D As shown in FIG. 2 , it is a three-dimensional schematic diagram of the manufacturing process of the mask ROM according to a preferred embodiment of the present invention.

[0023] Please refer to Figure 1A , first provide a substrate 100 . Next, a gate dielectric layer 102 and a strip-shaped conductive structure 104 are formed on the substrate 100 . Wherein, the method for forming the gate dielectric layer 102 and the elongated conductive structure 104 is, for example, to firstly use a thermal oxidation method to form a thin oxide layer (not shown) on the surface of the substrate 100, and then form a thin oxide layer on the thin oxide layer. a conductive layer (not shown). Next, the conductive layer is patterned to form strip-shaped conductive structures 104 . Then, the thin oxide layer not covered by the elongated conductive structure 104 is removed to form the gate dielectric layer 102 . In this embodiment, the material of the elongated c...

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Abstract

A mask read-only memory structure and its manufacturing method, the structure includes a substrate; a plurality of gates arranged above part of the substrate; a gate dielectric layer arranged between the substrate and the gate; An embedded bit line is arranged in the substrate on both sides of the gate; an insulating layer is arranged above the buried bit line and between the gate; a plurality of word lines, each word line is perpendicular to the embedded bit line The direction of the bit lines is arranged on the same row of gates and on the insulating layer; and a coding layer is arranged between the word lines and the gates.

Description

technical field [0001] The present invention relates to a memory structure and its manufacturing method, and in particular to a mask read-only memory (Mask ROM) structure and its manufacturing method. Background technique [0002] A general mask ROM structure includes several bit lines (Bit Line, BL) and several polysilicon word lines (Word Line, WL) across the bit lines. The area below the word line and between two adjacent bit lines is the channel area of ​​the memory cell. For some mask ROMs, the programming method is to store data "0" or "1" by implanting ions in the channel or not. The manufacturing process of implanting ions in specific channel regions is also called code implantation manufacturing process. [0003] Generally, in the manufacturing process of mask ROM code implantation, firstly, a photomask is used to pattern the photoresist layer formed on the substrate, so as to expose the channel region to be coded. Then, an ion implantation manufacturing process ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/112H01L21/8246H10B20/00
Inventor 张庆裕
Owner MACRONIX INT CO LTD
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