Phase transformation memory and manufacturing method thereof

Abstract

The invention provides a manufacturing method of a phase-change memory, which is suitable for a semiconductor substrate. Firstly, an N+ epitaxial layer and an N- epitaxial layer are formed on the above-mentioned semiconductor substrate. Next, a first shallow trench isolation structure is formed in the above-mentioned N+ epitaxial layer and N- epitaxial layer to isolate predetermined word line regions, and a second shallow trench isolation structure is formed in the above-mentioned N- epitaxial layer to isolate predetermined word line regions. P+ doped region. Next, an insulating layer is formed and defined, and an N+ doping is performed on part of the above-mentioned N- epitaxial layer to form an N+ doped region electrically connected to the above-mentioned N+ epitaxial layer, and a P+ doping is performed on the above-mentioned N+ epitaxial layer to form a P+ doped region. Then, a contact plug passing through the insulating layer is formed on the N+ doped region and the P+ doped region respectively. Finally, an electrode having an upper electrode, a phase change layer and a lower electrode is formed on each of the contact plugs.

Description

technical field [0001] The invention relates to a memory, in particular to a phase-change memory and a manufacturing method thereof. Background technique [0002] figure 1 To show the traditional phase change memory structure. The phase change memory structure includes a semiconductor substrate 10, an N+ doped layer 12 formed on the semiconductor substrate 10, an N-doped layer 14 formed on the N+ doped layer 12, and an N+ doped region 16 formed on the In the N-doped layer 14, the -P+ doped region 18 is formed in the N-doped layer 14, and an insulating layer 20 is formed on the semiconductor substrate 10, and the insulating layer 20 can be an oxide layer. The contact plug 22 includes a barrier layer 24 and a metal layer 26 . The electrodes 28 are respectively formed on the contact plugs 22 , and the electrodes 28 have an upper electrode 34 , a phase change layer 32 and a lower electrode 30 . [0003] The thickness and doping concentration of the N+ doped region and the N−...

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Problems solved by technology

[0003] The thickness and doping concentration of the N+ doped region and N- doped region in the above-mentioned traditional phase change memory structure are difficult to control, so that the breakdown voltage (BDV) cannot be adjusted

And adjacent P+ / P+ intervals and adjacent word lines / word lines are prone to breakdown (punch)

Therefore, the component size is not easily reduced

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