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Magnetic resistance memory and its reading method

A magnetoresistance, memory technology, used in static memory, digital memory information, information storage and other directions

Inactive Publication Date: 2002-04-10
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] 1. The array must allow a size of (hundreds) x (hundreds) memory cells
[0006] 2. The readout signal must have a certain minimum value in order to enable a sufficiently reliable analytical processing
The amplifier circuits presented there are prone to stability problems in application

Method used

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  • Magnetic resistance memory and its reading method
  • Magnetic resistance memory and its reading method
  • Magnetic resistance memory and its reading method

Examples

Experimental program
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Effect test

Embodiment Construction

[0075] The present invention should be described in detail below by means of embodiments, based on the accompanying drawings,

[0076] As explained above, it is possible to implement the invention using a simple evaluation processor with one input and a simple evaluation method. The dual readout method detailed below allows reliable analytical processing despite the expected large local cell resistance variation. It is divided into the following steps in detail:

[0077] 1. Read cell status and storage information,

[0078]2. Subsequent connection attempts in one direction,

[0079] 3. Further read out the cell state and storage information,

[0080] 4. Compare results and analyze and process.

[0081] The first analysis process ( figure 1 ): a matrix consisting of m word lines 5a, 5b and n bit lines 4a, 4b is suggested, on which the selected The word line 5a is applied to a predetermined potential (for example, 1.2V). The selected bit line 4a is connected to GND via th...

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Abstract

The invention relates to a magnetoresistive memory includes magnetoresistive memory cells disposed in a plurality of rows and / or columns. A bit line is connected to first poles of the memory cells of a column. A word line is connected to second poles of the memory cells of a row. A read voltage source having a switching element is separately connectable to first ends of the word lines. A voltage evaluator has at least one input that is separately connectable to first ends of the bit lines via a switching element. A first terminating resistor branches from the evaluation line. An impedance converter has an input connected to the evaluation line and has an output separately connectable to second ends of the bit lines and word lines via the switching element. The invention also relates to a method of reading magnetoresistive memories.

Description

technical field [0001] The present invention relates to a magnetoresistive memory and a method for reading memory cells in such a magnetoresistive memory. Background technique [0002] Magneto-resistive memory is an alternative to conventional DRAM memory and SRAM memory, as well as non-volatile memory such as flash or EEPROM. They consist of an arrangement of memory cells to which bitlines and wordlines lead. Each memory cell of a magnetoresistive memory consists of two magnetic elements separated from each other by a dielectric layer. One of the magnetic elements is hard magnetic, and thus given in its flux direction, the other magnetic element is soft magnetic, and can be switched between them by applying suitable switching currents on the bit and word lines. Reverse up. The dielectric layer arranged between the two magnetic elements is a so-called tunnel dielectric layer, for example a 2 nm thick layer suitable as a tunnel dielectric layer. As a f...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/14G11C11/15G11C11/16
CPCG11C11/16G11C11/1673G11C11/15
Inventor R·特维斯W·韦伯H·范登贝格
Owner INFINEON TECH AG