Module address unit based on porallel bus

A technology of address unit and bus, which is applied in the direction of instruments, electrical digital data processing, etc., can solve the problems of difficult allocation of new modules and difficulty of allocation of address resources for controlled modules, and achieve the effect of convenient function expansion and flexible allocation

Inactive Publication Date: 2003-08-13
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Currently, due to the limited number of address lines of the address bus, in an electronic system based on a parallel bus, the address resources assigned by the master control module to the controlled module are limited. If the system is

Method used

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  • Module address unit based on porallel bus
  • Module address unit based on porallel bus
  • Module address unit based on porallel bus

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Embodiment Construction

[0018] Provide the module address unit of parallel bus according to the present invention, be to set following unit in this module and realize the object of the present invention, it comprises bus isolation and drive bus isolation and drive circuit 101, read and write signal switch circuit 104, module enables generation circuit 102 . Module control signal generating circuit 103 ; wherein the module enabling generating circuit 102 includes a module address encoding circuit 201 , a multi-bit serial-in / parallel-out shift register 202 , and a module enabling logic circuit 203 .

[0019] exist figure 1 In the composition structure of the shown module, there is a bus isolation and drive circuit 101 for completing the isolation and driving of the bus signal, a module enable generation circuit 102 for completing the generation of the module enable signal, and a module control signal generation for completing the generation of the module control signal. The circuit 103 , the read and w...

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Abstract

A module address unit based on parallel bus for different modules is composed of bus isoalting and driving circuit, module enable generator, module control signal generator and R/W signal switching circuit. Its features are that the address space is independent to the number of address lines in address bus and theoritically unlimited, the module address allocation is very flexible, and the positions of the modules with different functions and be exchanged without influence on their recognition and functions.

Description

technical field [0001] The invention relates to the electronic system bus technology, in particular to the design technology of the address of a certain module in the parallel bus. Background technique [0002] The electronic system bus is divided into two categories: serial bus and parallel bus. The function of the bus is to provide inter-module communication, data exchange, control and other operations for each module of the electronic system. The characteristic of the serial bus is that the data it transmits is carried out sequentially and bit by bit, while the characteristic of the parallel bus is that the data transmitted is multi-bit simultaneously. In electronic systems, both bus technologies are widely used. The parallel bus generally consists of an address bus (ADBUS), a database bus (DATABUS), and a control bus. The signals on the address bus are address signals, the signals on the data bus are data signals, and the signals on the control bus are control signals....

Claims

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Application Information

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IPC IPC(8): G06F13/38
Inventor 杨素纯
Owner ZTE CORP
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