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Method for operating MRAM semiconductor memory arrangement

A memory and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, static memory, etc., can solve reliability problems, time-consuming information changes, etc.

Inactive Publication Date: 2010-09-08
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method is time consuming and can lead to changes in information if the reading method is not 100% reliable
Reliability issues can arise because writes must be activated more often

Method used

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  • Method for operating MRAM semiconductor memory arrangement
  • Method for operating MRAM semiconductor memory arrangement
  • Method for operating MRAM semiconductor memory arrangement

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0024]In a first exemplary embodiment according to the invention, information is stored in the soft magnetic layer 13 (Fig. 1). During reading, a current signal corresponding to the information stored in the TMR memory cell is initially recorded without an externally applied magnetic field. Afterwards, the soft magnetic layer 13 is caused to pass through approximately 45- Rotated by 60°, and altered as the resulting current signal was compared with the previously recorded current signal. If the magnetization of the soft magnetic layer 13 is parallel to the magnetization of the hard magnetic layer 11 (e.g., corresponding to a logic "0"), the resistance increases; if the magnetization of the soft magnetic layer 13 is antiparallel to the magnetization of the hard magnetic layer 11 ( Corresponding to logic "1"), the resistance decreases. Afterwards, due to magnetic anisotropy, the magnetization reverses in the original direction corresponding to the stored information. Exemplar...

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Abstract

The invention relates to a method for operating an MRAM semiconductor memory arrangement, whereby, in order to read stored information, reversible magnetic changes are carried out on the TMR cells (TMR1, TMR2, ...) and a corresponding transient changed current compared with the original read signal. The TMR memory cell itself can thus serve as reference, although the information in the TMR memorycell is not destroyed, in other words the same must not be back-written. The invention is used to advantage in an MRAM memory arrangement, in which several TMR cells (TMR1, ..., TMR4) are connected in parallel to a selection transistor (TR1) and in which a write line (WL1, WL2), not electrically connected to the memory cell, is provided.

Description

technical field [0001] The present invention relates to a method of operating an MRAM semiconductor memory arrangement with a plurality of TMR memory cells connected at one of their terminals to a bit line and at their other terminal to a word line in an array of memory cells. Background technique [0002] As known, the MRAM semiconductor memory arrangement is based on ferromagnetic storage assisted by the TMR effect: at the intersection of word lines and bit lines is a TMR memory with a layer stack comprising a soft magnetic layer, a tunneling resistance layer and a hard magnetic layer unit. Generally, the magnetization direction of the hard magnetic layer is predetermined, but the magnetization direction of the soft magnetic layer is adjusted by passing current in a specific direction through the word line and the bit line. With these currents, the soft magnetic layer can be magnetized in a parallel or antiparallel manner with respect to the hard magnetic layer. In the c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/105H01L43/08G11C11/15H01L21/8246H10B20/00
CPCG11C11/15
Inventor D·戈格尔T·施洛塞
Owner INFINEON TECH AG