Processor block for forming large-scale extendible processor system

A data processing system and processor technology, applied in memory systems, electrical digital data processing, instruments, etc., can solve problems such as limiting the actual bandwidth of the chip, long memory delay, and still existing requirements.

Inactive Publication Date: 2004-11-03
IBM CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Unfortunately, the small surface area available on a chip to provide buses severely limits the number or overall width of buses, and thus the actual bandwidth that each chip can directly support
[0009] It can be seen that each increase in the number of processors in a processor system becomes increasingly restrictive and increasingly impractical
However, the need for more complex systems with greate

Method used

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  • Processor block for forming large-scale extendible processor system
  • Processor block for forming large-scale extendible processor system
  • Processor block for forming large-scale extendible processor system

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Embodiment Construction

[0023] The present invention introduces a novel processor block comprising two interconnected multi-chip modules (MCMs). This processor block is in turn designed to connect to other processor blocks on the system rack to provide much larger business and technical systems. Additionally, unlike prior art multi-chip configurations, routing logic is provided within the processors of this processor block to enable the processors to expose all memory capabilities, thereby enabling more thorough use of the available memory bandwidth.

[0024] Therefore, the present invention is implemented in a processor configuration in which each processor has been able to fully use the distributed memory without any memory mapping relationship (ie fully-aggregate model). One way this can be done is to reconfigure a two-way system where the processors are connected by a 16-byte bus. With a wider bus, each processor in a two-way or larger system has full access to the block of memory coupled to any...

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Abstract

A method and system for providing a multiprocessor processor book that is utilized as a building block for a large scale data processing system. Two 4-way multi-chip modules (MCM) are utilized to create the processor book. The first and second MCMs are configured with normal wiring among their respective processors. An additional wiring is provided that links external buses of each chip of the first MCM with buses of a corresponding chip of the second MCM and vice versa. The additional wiring enables each processor of the first MCM substantially direct access to the distributed memory components of the next MCM with no affinity. The processor book is plugged into a processor rack configured to receive multiple processor books that together make up the large scale data processing system.

Description

technical field [0001] The present invention relates generally to data processing systems and, in particular, to multiprocessor data processing systems. More particularly, the present invention relates to a method and system for efficiently interconnecting multiple processors to provide building blocks for large scalable multiprocessor systems. Background technique [0002] The development of commercial data processing systems has advanced rapidly. From the design and use of uniprocessor systems, this development has evolved to the design and use of more complex multiprocessor systems (MP). Most of these developments are driven by industry's growing demand for greater processing power and faster data manipulation. [0003] Technology and commodity servers are two examples of systems that benefit from increased processing power and faster overall data operations. These systems are typically designed with a distributed memory system, with each processor having direct access...

Claims

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Application Information

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IPC IPC(8): G06F15/173G06F9/00G06F13/12G06F13/36G06F15/16
CPCG06F15/17337B26B11/00B26B5/001B26B1/08
Inventor 拉维·K·阿里迈利维森特·E·钟乔迪·B·乔伊纳杰里·D·刘易斯
Owner IBM CORP
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