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Wafer-level electronic modules with integral connector contacts and methods of fabricating the same

A technology of electronic modules and contacts, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve environmental problems, reliability environmental problems, reduce module size, etc.

Inactive Publication Date: 2005-06-08
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Conventional device packaging and wiring technologies appear to be approaching minimum form factor limits that limit designers' ability to further reduce module size
Also, techniques that use soldered connections can have reliability and environmental concerns
For example, just figure 1 and 2 For the module shown in , the mechanical shear stress induced on the solder bead by the thermal expansion coefficient mismatch of the device 50 and the PCB 10 may cause the solder joint to fracture
Additionally, the lead content in conventional solders creates environmental concerns

Method used

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  • Wafer-level electronic modules with integral connector contacts and methods of fabricating the same
  • Wafer-level electronic modules with integral connector contacts and methods of fabricating the same
  • Wafer-level electronic modules with integral connector contacts and methods of fabricating the same

Examples

Experimental program
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Embodiment approach

[0027] According to another embodiment of the present invention, electronic components such as resistors, capacitors and / or inductors can be combined in such as Figure 6-9 shown in the redistribution structure of the monolithic substrate. For example, refer to Figure 10 , in the middle insulating layer ( Figure 10 (not shown in ) is used as a capacitor medium, the capacitor 1000 can be formed by the first and second conductive layers 210 ″, 220 ″ of the redistribution structure. Electrodes formed in layers 210", 220" may be connected to lines formed in another layer 230" of the redistribution structure using vias 219", 227". Similarly, see Figure 11 , the inductor 1100 can be formed by the first and second conductive layers 210'', 220'' of the redistribution structure together with the via hole 217''. The ends of the inductor may be connected to the third conductive layer 230'' of the redistribution structure through via holes 219'', 227''. It should be appreciated tha...

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PUM

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Abstract

An electronic module comprising a monolithic microelectronic substrate including at least one integrated circuit die, eg, a plurality of undivided memory dies or a hybrid of different types of integrated circuit dies. The monolithic substrate also includes a redistribution structure disposed on at least one integrated circuit die and providing connector contacts coupled to the at least one integrated circuit die. For example, the connector contact may be configured in the form of an edge connector contact for the module. The redistribution structure may be configured in the form of a passive electronic device providing electrical connection to the at least one integrated circuit die, and / or the redistribution structure may include at least one A conductive layer in the form of an electrical connection is realized by a contact pad of an electronic device, wherein the passive device may be, for example, an inductor, a capacitor and / or a resistor. A method of manufacturing the electronic module is also discussed.

Description

technical field [0001] The present invention relates to an electronic module, and more specifically, to a wafer-level module and a manufacturing method thereof. Background technique [0002] A typical conventional electronic module, such as a memory module, may include multiple packaged integrated circuit devices mounted on a printed circuit board (PCB). These integrated circuit devices can be packaged in a variety of different form factors, including traditional thru-hole packaging and surface mount packaging that facilitate hand and / or wave soldering techniques, as well as chip-scale packaging (CSP ) and wafer-level chip-scale packaging (WLCSP) designed for bonding to PCBs using solder bead technology. [0003] figure 1 A conventional module with a WLCSP device 50 mounted on a PCB 10 is shown. Although not shown in the drawings, the PCB 10 includes circuit traces interconnecting the devices 50 and passive devices 70 such as inductors, capacitors and resistors. The PCB ...

Claims

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Application Information

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IPC IPC(8): H01L25/18H01L21/768H01L21/82H01L23/50H01L25/04H01L27/02
CPCH01L21/82H01L23/50H01L25/04H01L21/768H01L25/18H01L27/02H01L2924/0002H01L2924/00H01L23/5389H01L2924/15311H01L2224/04105H01L2224/73267H01L24/19H01L2924/14H01L2224/12105H01L2924/00014H01L25/0655
Inventor 白承德张东铉金玖星李康旭郑载植
Owner SAMSUNG ELECTRONICS CO LTD
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