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Semiconductor device and its manufacturing method

A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as inability to meet requirements, and achieve the effect of high withstand voltage

Inactive Publication Date: 2006-08-23
ROHM CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the withstand voltage of such a semiconductor device cannot actually meet the required level.

Method used

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  • Semiconductor device and its manufacturing method
  • Semiconductor device and its manufacturing method
  • Semiconductor device and its manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0047] figure 1 It is a schematic cross-sectional view showing the structure of the semiconductor device 1 according to the first embodiment of the present invention.

[0048] In the constituent conductivity type is N + On the silicon substrate 2 constituting the drain region, a semiconductor layer 13 forming a so-called super junction structure is provided. The semiconductor layer 13 includes conductivity type N - type of the drift layer 3 and the conductivity type is P - type RESURF layer 9, the drift layer 3 and the RESURF layer 9 are arranged so that they appear alternately (repeatedly) in sequence on the silicon substrate 2 in parallel and laterally.

[0049] A plurality of trenches 4 penetrating the semiconductor layer 13 to a depth of the silicon substrate 2 are formed substantially parallel to each other. The trench 4 has an inner side wall that is substantially perpendicular to the silicon substrate 2, and is perpendicular to the figure 1 Extend in the directio...

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Abstract

A semiconductor device, including: a semiconductor substrate of a first conductivity; and a semiconductor layer provided on the semiconductor substrate and having a super junction structure including drift layers of the first conductivity and RESURF layers of a second conductivity different from the first conductivity, the drift layers and the RESURF layers being laterally arranged in alternate relation parallel to the semiconductor substrate, the RESURF layers being each provided alongside an interior side wall of a trench penetrating through the semiconductor layer, the drift layers each having an isolation region present between the RESURF layer and the semiconductor substrate to prevent the RESURF layer from contacting the semiconductor substrate.

Description

technical field [0001] The present invention relates to a semiconductor device having a so-called superstructure structure and a method of manufacturing the same. Background technique [0002] In a semiconductor device forming a MOS field effect transistor (Metal Oxide Semiconductor Field Effect Transistor; MOS FET), an attempt has been made to increase the breakdown voltage. [0003] Figure 5 It is a diagrammatic sectional view of a conventional semiconductor device (see Japanese Unexamined Patent Publication No. 2003-46082 ) in which MOS FETs are formed. [0004] in N ++ A semiconductor layer 54 including an N-type drift layer (N-type pillar layer) 52 and a P-type RESURF layer (P-type pillar layer) 53 is formed on an N-type semiconductor substrate 51 . The drift layer 52 and the RESURF layer 53 are arranged so that they appear repeatedly on the semiconductor substrate 51 in a parallel direction, forming a so-called super junction structure. [0005] A plurality of groo...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L21/265H01L21/336H01L29/06H01L29/08H01L29/40
CPCH01L29/66712H01L21/26586H01L29/1095H01L29/0873H01L29/7802H01L29/0634H01L29/407
Inventor 高石昌
Owner ROHM CO LTD
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