Semiconductor memory module unit for point-to-point data interchange

Abstract

The invention describes a semiconductor memory module unit for P2P data interchange with a memory controller. Memory chips having different data widths can be arranged on the semiconductor memory module unit in such a way as to enable a tree-like branching by signal data transmission from a node-like memory chip to a plurality of downstream memory chips while retaining the data width.

Description

Technical field

[0001] The present invention relates to a semiconductor memory module unit for point-to-point (P2P) data exchange with a memory controller. Background technique

[0002] DDR-1, DDR-2, and DDR-3 generation storage systems use hybridT or flyby connections to provide commands and address data (CA) to the DRAM. In this case, the CA signal is provided to different DRAMs via the CA bus, which limits the speed of the CA bus. The high-speed requirements of DDR-4 or later-generation DRAM memories require fast bus systems to support. Therefore, a suitable bus system is to establish a P2P connection between the semiconductor memory module and the memory controller.

[0003] DDR-2 and DDR-3 two-generation memory semiconductor memory modules such as DIMM (dual in-line memory module), for example, a ×4 DRAM memory chip can be used (×4: 4 bits of data bandwidth per memory access) Instead of using ×8 DRAM, which doubles the number of DRAMs on semiconductor memory modules. Compare...

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