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Semiconductor processing

A semiconductor and processing chamber technology, applied in semiconductor/solid-state device manufacturing, chemical instruments and methods, crystal growth, etc., can solve problems such as adhesion, difficult quantitative measurement, wafer stress damage, etc.

Inactive Publication Date: 2007-04-25
ROHM & HAAS ELECTRONIC MATERIALS LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Sticking is difficult to measure quantitatively, but will be noticed qualitatively when lifting the wafer from the susceptor
If you experience a bond that stresses out the wafer, you have a sticking problem

Method used

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  • Semiconductor processing
  • Semiconductor processing

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0057] The CV silicon carbide susceptor ring was machined to a surface roughness Ra = 0.8 using conventional grinding equipment. Surface roughness was measured using a contact profilometer. Mechanical treatment was carried out by first treating with a 150-grit diamond wheel and then with a 320-grit diamond wheel. Grind at 1750 rpm for 9 hours. Photographs of the surface of the pedestal were taken. The upper part of Figure 4 shows a photograph at 30X magnification of the machined surface portion of the susceptor. Figure 4 shows characteristic grooves and reliefs produced by conventional mechanical processing.

[0058] Then through the Pellon Pad using diamond paste with a particle size of 4-8 microns TM The lapping pad laps the base ring. Grinding was carried out for 2 hours at a surface speed of 600 m / min.

[0059] Then take a picture of a portion of the surface of the base. The lower part of Figure 4 shows a 30X magnification photograph of the lapped susceptor. Groove...

Embodiment 2

[0064] The CVD silicon carbide susceptor ring was machined to a surface roughness Ra = 0.8 microns using conventional grinding equipment and methods as described in Example 1 . Surface roughness was measured using a contact profilometer.

[0065] Then pass through the Pellon Pad using a diamond paste with a particle size of 4-8 microns TM The lapping pad laps the base ring. Grinding at a surface speed of 1200 m / min for 2 hours. The susceptors were then polished for 3 hours using diamond paste with a particle size of 2-4 microns. Ra is expected to be less than 0.05 microns and Rz(din) to be less than 0.5 microns as measured by a contact profilometer.

[0066] The susceptor ring is then placed in the wafer holder and the semiconductor wafer is placed in the susceptor ring. The device was then placed in a CVD furnace with an inert argon atmosphere. The temperature of the heating furnace was raised from room temperature to 1100°C. The apparatus was heated in a furnace for 10...

Embodiment 3

[0068] The CVD silicon carbide susceptor ring was machined to a surface roughness Ra = 0.8 microns using conventional grinding equipment as described in Example 1. Surface roughness was measured using a contact profilometer.

[0069] Then pass through the Pellon Pad using a diamond paste with a particle size of 4-8 microns TMThe lapping pad laps the base ring. Grinding for 3 hours at a surface speed of 1500 m / min. The susceptors were then polished for 4 hours using diamond paste with a particle size of 0.25-1 micron. Ra is expected to be 0.005 microns and Rz(din) to be 0.05 microns. The edge radius of the susceptor is expected to be greater than 0.1mm.

[0070] The susceptors are then placed in the wafer boat. A silicon semiconductor wafer is placed in a susceptor boat, which is then placed in a furnace. An atmosphere of inert argon and hydrogen was provided to the furnace. The furnace was heated to 1200°C, and the boat remained in the furnace for 10 hours. Allow the t...

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Abstract

The present invention is directed to semiconductor wafer processing to provide semiconductor wafers having reduced defects.

Description

technical field [0001] The present invention relates to semiconductor wafer processing methods for producing defect-reduced semiconductor wafers. More particularly, the present invention relates to semiconductor wafer processing methods that can provide semiconductor wafers with reduced defects by processing in wafer holding articles with reduced surface roughness. Background technique [0002] One problem with semiconductor wafer processing is that wafers often develop defects known as slip. Slip is the dislocation of molecules along crystal planes that form when parts of a single crystal move toward each other along those crystal planes. This movement occurs when the contact between the susceptor and the wafer is not optimal. Typically, slip begins on the backside of the wafer in contact with the susceptor surface and propagates through the wafer as processing continues. There can be many reasons for slippage, but the basic problem is that when a wafer is placed on a su...

Claims

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Application Information

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IPC IPC(8): H01L21/687H01L21/00C23C16/458C30B25/12
CPCH01L21/67306C23C16/4581H01L21/68735H01L21/68785C30B25/12H01L21/67309H01L21/68757C23C16/345H01L21/283
Inventor J·S·戈尔拉M·A·皮克林J·T·费伊M·S·斯特里克兰德
Owner ROHM & HAAS ELECTRONIC MATERIALS LLC