Decoupling storage controller cache read replacement from write retirement
A memory controller and high-speed cache technology, applied in memory systems, electrical digital data processing, instruments, etc., can solve problems such as wasting processor cycles
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[0017] Figure 3 is a block diagram of a data processing environment 300 in which the present invention may be implemented. Storage controller 310 receives input / output (I / O) requests from one or more hosts 302A, 302B, 302C to which storage controller 310 is attached via network 304 . I / O requests are directed to tracks in storage system 306, where storage system 306 has disk drives in any of several configurations, for example, random access storage device (DASD), redundant array of independent disks (RAID array), Simple disk cluster (JBOD), etc. Storage controller 310 includes processor 312 , cache manager 314 and cache 320 . Cache manager 314 may include hardware components or software / firmware components executed by processor 312 to manage cache 320 . Cache 320 includes a first portion and a second portion. In one embodiment, the first cache portion is a volatile storage device 322 and the second cache portion is a non-volatile storage device (NVS) 324 . The cache manag...
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