Memory device and method of operating memory device

Abstract

The present technology includes a memory device and a method of operating the memory device. The memory device includes a memory block including a plurality of memory cells connected to word lines, peripheral circuits configured to generate operation voltages to be applied to the word lines, and control logic configured to control the peripheral circuits in response to a program command, a read command, or an erase command. The peripheral circuits include a voltage generator that adjusts a section of threshold voltage distributions of memory cells to be programmed among the memory cells, according to a distance between the word lines.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]The present application claims priority under 35 U.S.C. § 119(a) to Korean patent application number 10-2019-0075458, filed on Jun. 25, 2019, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference.BACKGROUND1. Technical Field[0002]The present disclosure generally relates to a memory device, and more particularly to a memory device and a method of operation the memory device.2. Related Art[0003]A memory device may store data or output the stored data. For example, the memory device may be a volatile memory device in which stored data is lost when power supply is interrupted, or may be a non-volatile memory device in which stored data is maintained even though the power supply is interrupted. Such a memory device may include a memory cell array in which data is stored, peripheral circuits that performs various operations such as program, read, and erase, and control logic that controls ...

AI Technical Summary

Benefits of technology

This patent describes a memory device that includes a memory block with multiple memory cells connected to word lines. The device also has peripheral circuits that generate operation voltages for the word lines and control logic to manage the circuits based on different commands. The peripheral circuits adjust the voltage levels for programming the memory cells based on their distance from the word lines. The device also includes a vertical channel film and word lines stacked and spaced apart from each other along the vertical channel film. The device operates by applying program voltages and verify voltages to selected word lines to program specific memory cells. The technical effects of this patent include improved programming precision and efficiency for memory cells in a memory device.

Problems solved by technology

Therefore, during a program operation, interference between the memory cells stacked in the vertical direction may occur.

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