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Control-quasi-independent-points guided speculative multithreading

a control-quasi-independent point and multi-threading technology, applied in the field of information processing systems, can solve the problems of affecting the efficiency and affecting the effectiveness of speculative thread execution

Inactive Publication Date: 2004-08-05
TAHOE RES LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention relates to a method and apparatus for generating instructions for control-quasi-independent-points guided speculative multithreading. This method and apparatus allow for the efficient parallelization of single-threaded applications through the use of speculative threads. The method and apparatus address issues related to speculative multithreading, such as determining which sections of code should be speculatively executed, and how to handle data flow dependency among parallel threads. The technical effects of the invention include improved performance and speed of execution of single-threaded applications and increased efficiency of parallelization.

Problems solved by technology

Utilizing otherwise idle threads to speculatively parallelize the single-threaded application can increase speed of execution, but it is often-times difficult to determine which sections of the single-threaded application should be speculatively executed by the otherwise idle thread.
In addition, speculative thread execution can be delayed, and rendered less effective, due to latencies associated with data fetching.

Method used

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Examples

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Embodiment Construction

[0015] FIG. 1 is a flowchart illustrating at least one embodiment of a method for generating instructions to facilitate control-quasi-independen-t-points ("CQIP") guided speculative multithreading. For at least one embodiment of the method 100, instructions are generated to reduce the execution time in a single-threaded application through the use of one or more simultaneous speculative threads. The method 100 thus facilitates the parallelization of a portion of an application's code through the use of the simultaneous speculative threads. A speculative thread, referred to as the spawnee thread, executes instructions that are ahead of the code being executed by the thread that performed the spawn. The thread that performed the spawn is referred to as the spawner thread. For at least one embodiment, the spawnee thread is an SMT thread that is executed by a second logical processor on the same physical processor as the spawner thread. One skilled in the art will recognize that the met...

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Abstract

A method for generating instructions to facilitate control-quasi-independent-point multithreading is provided. A spawn point and control-quasi-independent-point are determined. An instruction stream is generated to partition a program so that portions of the program are parallelized by speculative threads. A method of performing control-quasi-independent-point guided speculative multithreading includes spawning a speculative thread when the spawn point is encountered. An embodiment of the method further includes performing speculative precomputation to determine a live-in value for the speculative thread.

Description

[0001] 1. Technical Field[0002] The present invention relates generally to information processing systems and, more specifically, to spawning of speculative threads for speculative multithreading.[0003] 2. Background Art[0004] In order to increase performance of information processing systems, such as those that include microprocessors, both hardware and software techniques have been employed. One software approach that has been employed to improve processor performance is known as "multithreading." In multithreading, an instruction stream is split into multiple instruction streams that can be executed in parallel. In software-only multithreading approaches, such as time-multiplex multithreading or switch-on-event multithreading, the multiple instruction streams are alternatively executed on the same shared processor.[0005] Increasingly, multithreading is supported in hardware. For instance, in one approach, processors in a multi-processor system, such as a chip multiprocessor ("CMP...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F9/00G06F9/30G06F9/38G06F9/44G06F9/45G06F9/46G06F9/48
CPCG06F8/433G06F9/3009G06F9/3842G06F9/3808G06F9/4843G06F9/3832G06F9/3851
Inventor MARCUELLO, PEDROGONZALEZ, ANTONIOWANG, HONGSHEN, JOHN P.HAMMARLUND, PERHOFLEHNER, GEROLF F.WANG, PERRY H.LIAO, STEVE SHIH-WEI
Owner TAHOE RES LTD
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