Cache controller computer system and method for program recompilation

Abstract

A computer system which dynamically extracts multiple threads from a program using a thread binary compiler (TBC), and a simultaneous multithreading (SMT) method. The computer system loads the TBC to a cache and controls the cache such that the TBC divides the program into multiple threads, and the cache loads the program as a recompiled program, whenever the cache loads a program stored in main memory.

Description

[0001] This application claims priority from Korean Patent Application No. 2003-7414, filed on 6 Feb. 2003, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.[0002] 1. Field of the Invention[0003] The present invention relates to a cache controller of a computer system, and more particularly, simultaneous multithreading of a computer system and method for program recompilation and dynamic extraction of multiple threads.[0004] 2. Description of the Related Art[0005] A central processing unit (CPU) is typically pipelined so that several computer instructions are performed simultaneously during a clock cycle, thus improving CPU performance. Still, data dependencies, resource dependencies, control dependencies, and cache misses cause vertical and horizontal wastes during which computer instructions cannot be executed.[0006] In contrast, according to simultaneous multithreading (hereinafter, referred to as SMT), multip...

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Benefits of technology

[0014] In another exemplary embodiment, the simultaneous multithreading processor processes instructions from the threads such that the instructions from each thread can be executed simultaneously by taking advantage of minimized horizontal and vertical wastes.

[0020] In another exemplary embodiment of the present invention, there is provided a simultaneous multithreading method of a computer including, optionally, a hard disk or a flash memory, a main memory, a cache, a cache controller, and a simultaneous multithreading processor. In the simultaneous multithreading method, a program can be loaded into the main memory from one of the hard disk or flash memory, using the computer system. A thread binary compiler can be loaded to the cache, using, for example, the cache controller. The cache can be dynamically controlled such that the thread binary compiler can divide the program into multiple threads. The program can be loaded as a recompiled program, using the cache controller, whenever the cache loads the program from the main memory. Instructions from threads can be processed using the simultaneous multithreading processor such that the instructions from threads can be executed simultaneously by taking advantage of minimized horizontal and vertical waste.

Problems solved by technology

Still, data dependencies, resource dependencies, control dependencies, and cache misses cause vertical and horizontal wastes during which computer instructions cannot be executed.

However, this method requires more hardware devices as the complexity of circuit and logic increases, which makes it difficult to implement the thread generation method in hardware.

However, this method prevents the user from flexibly manipulating the binary system.

Moreover, this method is not suitable in that the user interprets and directly recompiles the binary code.

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