Redistribution layer shielding of a circuit element

Abstract

In some embodiments of the present invention, an apparatus includes an electromagnetic shielding structure. The electromagnetic shielding structure is formed at least partially in one or more redistribution layers formed on an integrated circuit die. The electromagnetic shielding structure substantially surrounds a circuit element, such as an inductor structure. The circuit element may be formed at least partially in the one or more redistribution layers. An inductor structure may be constructed as a loop structure at least partially in one or more redistribution layers formed on the integrated circuit die. The shielding structure may be formed at least partially in one or more redistribution layers of the integrated circuit die to enclose the inductor in a Faraday cage-like enclosure. The redistribution layers may be formed above integrated circuit pads or above a passivation layer of the integrated circuit die.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S)[0001] This application is a continuation-in-part of co-pending application Ser. No. 10 / 463,961, filed Jun. 18, 2003, entitled "Integrated Circuit Package Configuration Incorporating Shielded Circuit Element Structure," naming Derrick C. Wei, Ying Shi, Kevin G. Smith, Steven P. Proffitt, Axel Thomsen, David Pietruszynski, and Ligang Zhang as inventors, which claims the benefit under 35 U.S.C. .sctn. 119(e) of U.S. Provisional Application No. 60 / 418,546, filed Oct. 15, 2002, entitled "Integrated Circuit Package Configuration Incorporating Shielded Inductor Structure," naming Derrick C. Wei, Ying Shi, Kevin G. Smith, Steven P. Proffitt, Axel Thomsen, and David Pietruszynski as inventors, which applications are incorporated herein by reference.[0002] 1. Field of the Invention[0003] The present invention relates to integrated circuits, and more particularly to such integrated circuits incorporating shielded inductor structures.[0004] 2. Descripti...

AI Technical Summary

Benefits of technology

The present invention relates to improving the quality of integrated circuit devices, particularly in relation to the need for a high-Q inductor structure that is immune to external noise sources. The invention proposes an electromagnetic shielding structure that surrounds a circuit element, such as an inductor structure, to reduce the impact of external sources of noise. The shielding structure is formed in one or more redistribution layers formed on the integrated circuit die and includes a passivation layer. The method also includes conducting balanced current through the inductor loops of the inductor structure. The invention provides a better solution for achieving stable oscillators, particularly for low-jitter clock sources.

Problems solved by technology

It is difficult to achieve such a high-Q with conventional on-chip inductors using conductor and dielectric layer compositions and thicknesses which are typically encountered in traditional integrated circuit processes.

In addition, such inductors are susceptible to electromagnetic interference from external sources of noise.

Inductors inside of the PLL, particularly inside an LC oscillator included in the PLL, are most prone to pulling.

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